Columnar bump packaging process
A packaging process and columnar bump technology, which is used in the manufacture of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc., can solve the problems of short circuit of solder bumps, easy dripping between solders, and influence on soldering quality, etc., to prevent short circuits. , Improve reliability and save material cost
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[0031] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0032] figure 2 It is a flow chart of a specific embodiment of the present invention to form solder bumps, including steps:
[0033] S101, forming an under bump metal layer on the pad and the passivation layer of the chip;
[0034] S102, forming a photoresist on the UBM layer, the photoresist having an opening to expose the UBM layer above the chip pad;
[0035] S103, forming a copper pillar on the UBM layer in the opening;
[0036] S104, forming solder bumps on the copper pillars;
[0037] S105, removing the photoresist;
[0038] S106, etching the UBM layer on the passivation layer until the passivation layer is exposed;
[0039] S107, forming an oxide layer on the surface of the exposed copper pillar;
[0040] S108 , removing oxides on the surface of the solder bumps, and reflowing the solder bumps.
[0041] First, step S101 is p...
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