High-reliability silicon on insulator (SOI) laterally diffused metal oxide semiconductor (LDMOS) power element

Abstract

Disclosed is a high-reliability silicon-on-insulator (SOI) laterally diffused metal oxide semiconductor (LDMOS) power element, which comprises a buried layer with high concentration and a contact injection region, wherein the buried layer with high concentration and the contact injection region are injected in top layer silicon of the SOI LDMOS power element, and the buried layer is connected with the contact injection region; current carriers which are located near a SOI LDMOS gate in the SOI LDMOS power element can be extracted through the buried layer and educed through the contact injection region, and electric potentials which are near the SOI LDMOS gate can be controlled. According to the high-reliability SOI LDMOS power element, in the top layer silicon of the SOI LDMOS, the buried layer with high concentration is produced and educed through the contact injection region, the current carriers which are located near the SOI LDMOS gate in the SOI LDMOS power element can be extracted through the buried layer, the electric potentials which are near the gate can be controlled, so that damages or burning of LDMOS elements caused by the fact that parasitic transistors open due to noise current or colliding current, maintaining voltage of the LDMOS elements under static shock is raised simultaneously, electrical safety working areas of the LDMOS power elements are expanded, and reliability of the elements is strengthened.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a highly reliable SOI LDMOS power device. Background technique [0002] LDMOS (Lateral Double Diffused Metal Oxide Semiconductor Field Effect Transistor) has high gain, wide linear range, and low intermodulation distortion, and is widely used in various fields such as wireless communication and medical electronics. The longitudinal electric field of the SOI device structure is small, the inversion layer is thicker, the surface scattering effect is reduced, the mobility of the device is high, and the transconductance is large. In addition, the parasitic capacitance mainly comes from the capacitance of the buried silicon dioxide layer, which is much smaller than that in the bulk silicon MOSFET. Capacitance does not change with the scaling down of the device, and the junction capacitance and connection capacitance of SOI are very small. As a high-voltage and high-power de...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to solve the problem of poor reliability of SOI LDMOS power devices in the prior art and provide a highly reliable SOI LDMOS power device

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