Tri-strain SOI (Silicon On Insulator) Si based BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device based on crystal face selection and preparation method thereof
An integrated device and three-strain technology, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of confinement, low carrier material mobility of Si materials, etc.
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Embodiment 1
[0119] Embodiment 1: Preparation of 22nm three-strain SOI Si-based BiCMOS integrated device and circuit based on crystal plane selection, the specific steps are as follows:
[0120] Step 1, SOI substrate material preparation.
[0121] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si wafer with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0122] (1b) Select the P-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;
[0123] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;
[0124] (1d) SiO on the surface of the lower an...
Embodiment 2
[0182] Embodiment 2: Preparation of 30nm triple-strain SOI Si-based BiCMOS integrated device and circuit based on crystal plane selection, the specific steps are as follows:
[0183] Step 1, SOI substrate material preparation.
[0184] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si wafer with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0185] (1b) Select the P-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the lower layer;
[0186] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the substrate material of the lower layer and the upper layer of the active layer after injecting hydrogen, respectively;
[0187...
Embodiment 3
[0245] Embodiment 3: Prepare 45nm three-strain SOI Si-based BiCMOS integrated device and circuit based on crystal plane selection, the specific steps are as follows:
[0246] Step 1, SOI substrate material preparation.
[0247] (1a) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0248] (1b) Select the P-type doping concentration as 5×10 15 cm -3 The Si wafer with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower layer;
[0249] (1c) Using a chemical mechanical polishing (CMP) process to polish the lower layer and the surface of the upper substrate material after hydrogen injection;
[0250] (1d) SiO on the surface of the lower and upper substrate ma...
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