Self-correcting frequency synthesizer capable of optimizing properties of voltage-controlled oscillator and optimizing method of self-correcting frequency synthesizer

Abstract

The invention discloses an optimizing method of a self-correcting frequency synthesizer capable of optimizing properties of a voltage-controlled oscillator. The method comprises the following steps that: when a chip is electrified or a channel is changed each time, a frequency self-correcting loop in a synthesizer self-correcting circuit is started firstly, and a frequency sub-wave band code necessary for the voltage-controlled oscillator is searched; secondly a current self-correcting loop in the synthesizer self-correcting circuit is started, and a current sub-wave band code that an output amplitude of the voltage-controlled oscillator achieves an appointed amplitude is searched, so that the voltage-controlled oscillator works in a minimum power consumption, a good phase noise property is obtained, and at the same time the properties of the voltage-controlled oscillator are not changed when process deviation and temperature change occur; after the accomplishment of frequency correction and current correction is judged by a state machine, a synthesizer enters into the frequency self-locking process of a phase-locked loop; and the optimization and correction process is ended. The invention further discloses the self-correcting frequency synthesizer capable of optimizing the properties of the voltage-controlled oscillator. A wider frequency adjustment range can be obtained, and good local oscillator spectrum purity is obtained through small power consumption; and the optimizing method is suitable for the self-correcting frequency synthesizer of a transceiver with low power consumption, multiple modes and multi-band frequency.

Description

technical field [0001] The invention belongs to the technical field of wireless communication integrated circuits, and relates to a frequency synthesizer for a wireless transceiver, in particular to a self-calibrating frequency synthesizer that can optimize the performance of a voltage-controlled oscillator. The high-performance frequency synthesizer is mainly used in wireless transceiver chips . Background technique [0002] The frequency synthesizer is one of the core modules of the wireless transceiver chip, which provides the chip with a differential or quadrature local oscillator signal. The local oscillator signal should be able to be flexibly, quickly and smoothly adjusted and output accurately according to the input RF signal or system requirements . The quality of the output signal directly affects the blocking and sensitivity performance of the receiver, and also affects the noise figure of the whole machine. Therefore, for the frequency synthesizer of wireless co...

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Problems solved by technology

[0004] The performance of existing VCOs usually adopts an external calibration mode. The biggest problem in the external calibration mode is: a large workload, configuration values ​​are closely related to the consistency and temperature of the chip, and cannot guarantee the voltage under different process batches and temperature conditions. Controlled Oscillator Performance configuration values ​​are the same set of values

[0005] The paper "A single-chip quad-band(850 / 900 / 1800 / 1900MHz) direct conversion GSM / GPRS RF transceiver with integrated VCOs and fractional-n synthesizer" published by Magoon, R., etc., published in Solid- State Circuits, IEEE Journal of, Volume 37, Issue 12.1710-1720, December 2002, using multiple VCO configurable work to achieve multi-mode and multi-frequency work. Although this technology reduces power consumption, there are Defects with large area and high cost

"Design of wide-band CMOS VCO for multiband wireless LAN applications" published by Fong, N.H.W. et al., published in Solid-State Circuits, IEEE Journal of, Vol. 38, No. 8, 1333-1342, August 2003, using a VCO A wide frequency adjustment range is realized, but the coarse adjustment capacitor uses a variable capacitor, which reduces the Q value and phase noise performance of the circuit, and can only be manually corrected when switching frequencies.

The paper "A Fractional-N PLL for Multiband(0.8-6GHz) Communications Using Binary-Weighted D / A Differentiator and Offset-Frequency Δ-∑Modulator" published by Heng-Yu Jian et al., published in Solid-State Circuits, IEEE Journal of , Vol. 45, No. 04.768-780, April 2010, using a wideband VCO and self-calibration circuit, but because the power consumption of the wideband VCO in the highest frequency band and the lowest frequency band is more than 2 times different, and in different processes Under the deviation and temperature, the power consumption is also very different. The proposed technology is not optimized, but the maximum current mode is selected to work. There are obvious defects in obtaining the required performance with the lowest power consumption.

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