Composite semi-conductor integrated circuit with three-dimensional element

A technology of three-dimensional components and integrated circuits, which is applied to semiconductor devices, semiconductor/solid-state device components, circuits, etc., and can solve problems such as component damage and component performance reduction.

Inactive Publication Date: 2013-07-17
WIN SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, in order to take advantage of the advantages of copper pads, a reliable protective layer must be designed in this three-

Method used

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  • Composite semi-conductor integrated circuit with three-dimensional element
  • Composite semi-conductor integrated circuit with three-dimensional element
  • Composite semi-conductor integrated circuit with three-dimensional element

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Example Embodiment

[0026] figure 1 It is a schematic cross-sectional structure diagram of the composite semiconductor integrated circuit of the present invention, which includes at least one electronic component 11, a bonding pad 12 located above the electronic component 11, and a first dielectric layer 13 interposed between the two as electrical isolation. The electronic component 11 is formed on a composite semiconductor substrate, and a semi-insulating gallium arsenide substrate is preferred. The electronic component 11 can be a high electron mobility transistor (HEMT), a heterojunction bipolar transistor (HBT), a thin film resistor (TFR), a diode, a metal-insulating layer-metal capacitor (MIM) Or a stack of metal-insulating layer-metal capacitors.

[0027] The thickness of the first dielectric layer 13 between the electronic component 11 and the bonding pad 12 is between 10 and 30 microns. The thickness in this range is sufficient to effectively reduce the coupling capacitance between the ele...

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Abstract

The invention relates to a composite semi-conductor integrated circuit with a three-dimensional element. In the composite semi-conductor integrated circuit, a welding pad or an inductor is arranged above an electronic element in a three-dimensional mode. The thickness of a dielectric layer inserted between the welding pad or the inductor and the electronic element ranges from 10 microns to 30 microns, so that influence on the performance of the element caused by the structure is effectively reduced. A protective layer can be coated on the electronic element to prevent pollution from metal materials making the welding pad or the inductor, and therefore, relatively cheap copper can be used for making the welding pad and the inductor. The three-dimensional welding pad can be applied to a wire bonding technology or a lug bonding technology.

Description

technical field [0001] The present invention relates to a compound semiconductor integrated circuit with three-dimensional elements, especially a compound semiconductor integrated circuit in which pads or inductors are arranged three-dimensionally above the electronic components, and a dielectric layer is inserted between the two. Background technique [0002] With the development of the mobile communication industry, the demand for monolithic microwave integrated circuits (MMICs) with high integration density, high performance and simple manufacturing process is also increasing. Traditionally, the components of single crystal microwave integrated circuits such as transistors, capacitors, resistors, inductors, signal input / output pads and the connections between them are arranged in a two-dimensional manner. However, pads usually occupy a large plane area. This makes it impossible to increase the integration level of the chip and increase the size of the chip. In order to s...

Claims

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Application Information

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IPC IPC(8): H01L23/488
CPCH01L2224/10H01L2924/1305H01L2924/00
Inventor 高谷信一郎萧献赋
Owner WIN SEMICON
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