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Composite substrate with isolating layer and manufacturing method of composite substrate

A composite substrate and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as difficulty in forming a lattice structure, growing a GaN semiconductor epitaxial layer, and inability to form a lattice structure, so as to reduce the Production cost, performance improvement, and effects of avoiding dislocation defect regions

Active Publication Date: 2013-09-04
INST OF PHYSICS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the isolation layer is very thin, it is difficult to form a complete lattice structure, and it is usually amorphous, so the lattice quality of the subsequently grown semiconductor layer is difficult to guarantee
For example, if a silicon dioxide spacer and a GaN semiconductor layer are grown on a sapphire substrate, since the silicon dioxide spacer is an amorphous structure, a complete lattice structure cannot be formed, so it is impossible to directly grow a GaN semiconductor epitaxial layer on the silicon dioxide spacer

Method used

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  • Composite substrate with isolating layer and manufacturing method of composite substrate
  • Composite substrate with isolating layer and manufacturing method of composite substrate
  • Composite substrate with isolating layer and manufacturing method of composite substrate

Examples

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Embodiment 1

[0036] This embodiment provides a method for manufacturing a composite substrate with an isolation layer, the process flow of which is as follows Figure 1-8 shown, including:

[0037] 1) if figure 1 As shown, 300nm thick SiO was deposited on the surface of sapphire substrate 1 by PECVD method 2 The thin film is used as the first sub-isolation layer 2, and then a plurality of openings 21 are formed in the first sub-isolation layer 2 by photolithography and etching processes to expose the surface of the sapphire substrate 1. The plurality of openings 21 form a grating pattern, and the period is 4 microns, the width of the opening 21 is 1 micron;

[0038] 2) if figure 2 As shown, using the MOCVD lateral epitaxial growth technology, the substrate 1 at the opening 21 is used as a seed to prepare a GaN thin film as the seed layer 3, and the seed layer 3 starts epitaxial growth and lateral epitaxial growth from the substrate 1 at the plurality of openings 21, and bonding at th...

Embodiment 2

[0048] This embodiment provides a method for manufacturing a composite substrate with an isolation layer, the process flow of which is as follows Figure 1-8 shown, including:

[0049] 1) if figure 1 As shown, a 300nm thick SiO is formed on the surface of the silicon substrate 1 by PECVD or thermal oxidation. 2 Thin film is used as the first sub-isolating layer 2, and then a plurality of openings 21 are formed in the first sub-isolating layer 2 by photolithography and etching processes, exposing the surface of the silicon substrate 1, and the plurality of openings 21 form a grating pattern, and its period is 4 microns, the width of the opening 21 is 1 micron;

[0050] 2) if figure 2 As shown, using the MOCVD lateral epitaxial growth technology, the substrate 1 at the opening 21 is used as a seed to prepare a GaN thin film as the seed layer 3, and the seed layer 3 starts epitaxial growth and lateral epitaxy from the substrate 1 at the openings 21, and is formed in joining...

Embodiment 3

[0059] This embodiment provides a method for manufacturing a composite substrate with an isolation layer, the process flow of which is as follows Figure 1-8 shown, including:

[0060] 1) if figure 1 As shown, a metal molybdenum film with a thickness of 300 nm is formed on the surface of the sapphire substrate 1 by evaporation or sputtering as the first sub-isolation layer 2, and then a plurality of openings are formed in the first sub-isolation layer 2 by photolithography and etching processes 21, exposing the surface of the sapphire substrate 1, a plurality of openings 21 form a grating pattern, the period of which is 4 microns, and the width of the openings 21 is 1 micron;

[0061] 2) if figure 2 As shown, using the MOCVD lateral epitaxial growth technology, the substrate 1 at the opening 21 is used as a seed to prepare a GaN thin film as the seed layer 3, and the seed layer 3 starts epitaxial growth and lateral epitaxy from the substrate 1 at the openings 21, and is fo...

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Abstract

The invention provides a manufacturing method of a composite substrate with an isolating layer. The manufacturing method comprises the steps of forming a first sub isolating layer which is exposed out of the opening of the substrate on the substrate; forming a seed layer consisting of a semiconductor thin film on the first bus isolating layer and the substrate by using a transverse growing method; selectively etching the seed layer and reserving partial seed layer on the first sub isolating layer as a seed region; forming a second sub isolating layer which covers the substrate, the first sub isolating layer and the seed region; forming an opening in the second sub isolating layer, wherein the opening is exposed out of at least part of the seed region; and using the at least part of the seed region as a seed and growing a semiconductor layer on the second sub isolating layer by using the transverse growing method.

Description

technical field [0001] The invention relates to a substrate for manufacturing semiconductor devices, in particular to a composite substrate with an isolation layer and a manufacturing method thereof. Background technique [0002] In the semiconductor industry, silicon materials are usually used as substrates, and various semiconductor devices are fabricated on silicon substrates by means of doping, photolithography, deposition, etc. The substrates are electrically coupled, resulting in large leakage currents, high power dissipation, and large parasitic capacitances. [0003] In recent years, a new semiconductor device substrate - silicon on insulator wafer (SOI, Silicon On Insulator) has been developed, which is composed of single crystal silicon on the top layer, silicon oxide on the insulator in the middle layer and single crystal silicon on the bottom layer , forming semiconductor devices in the top layer of single crystal silicon. SOI uses a silicon oxide insulating la...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/02H01L29/06
CPCH01L29/78603H01L29/78657H01L29/78681
Inventor 陈弘贾海强江洋王文新马紫光王禄李卫
Owner INST OF PHYSICS - CHINESE ACAD OF SCI