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Ultrathin VSOP (very thin small outline package) packaging part and production method thereof

A production method and ultra-thin technology, applied in the direction of electrical components, semiconductor devices, electric solid devices, etc., can solve the problems of low packaging yield and high cost of small lead-out wire packaging, and achieve the effect of preventing product deviation and avoiding suspension

Active Publication Date: 2013-10-02
TIANSHUI HUATIAN TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, IC (integrated circuit) packaging technology continues to develop towards high integration, high performance, multi-lead and fine pitch, and then there is a very thin small outline package (VSOP package for short), VSOP package The distance between the connecting pin and the package is very small, which can meet the requirements of various functions, but the packaging yield of the existing small lead package is low, and the cost is high

Method used

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  • Ultrathin VSOP (very thin small outline package) packaging part and production method thereof
  • Ultrathin VSOP (very thin small outline package) packaging part and production method thereof
  • Ultrathin VSOP (very thin small outline package) packaging part and production method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0067] Through rough grinding, fine grinding and polishing, a wafer with a final thickness of 150 μm is obtained; during rough grinding, the rough grinding speed is 100 μm / min, and the rough grinding thickness ranges from the original wafer thickness + film thickness to 200 μm + film thickness; When grinding, the accuracy speed is 9μm / min, and the precision thickness ranges from 200μm + film thickness to 160μm + film thickness; when polishing, mechanical polishing is performed first, and then chemical polishing; polishing thickness ranges from 160μm + film thickness to 150μm + film thickness Thickness, the process of preventing chip warpage is adopted in the process of wafer thinning. Use DISC 3350 dicing machine to dicing the thinned wafers, set anti-fragmentation and anti-crack scribing optimization parameters through DOE optimization, scribing feed speed 6mm / s, clean and dry in time after scribing; take Stamped multi-row copper alloy electroplating lead frame with anti-spla...

Embodiment 2

[0079] Through rough grinding, fine grinding and polishing, a wafer with a final thickness of 170 μm is obtained; during rough grinding, the rough grinding speed is 75 μm / min, and the rough grinding thickness ranges from the original wafer thickness + film thickness to 220 μm + film thickness; When grinding, the accuracy speed is 10μm / min, and the precision thickness ranges from 220μm + film thickness to 180μm + film thickness; when polishing, mechanical polishing is performed first, and then chemical polishing; polishing thickness ranges from 180μm + film thickness to 170μm + film thickness Thickness, the process of preventing chip warpage is adopted in the process of wafer thinning. Use DISC 3350 dicing machine to dicing the thinned wafers, set anti-fragmentation and anti-crack scribing optimization parameters through DOE optimization, scribing feed speed 10mm / s, clean and dry in time after scribing; take Stamped multi-row nickel-palladium-gold electroplated lead frame with ...

Embodiment 3

[0081] Through rough grinding, fine grinding and polishing, a wafer with a final thickness of 160 μm is obtained; during rough grinding, the rough grinding speed is 50 μm / min, and the rough grinding thickness ranges from the original wafer thickness + film thickness to 210 μm + film thickness; When grinding, the accuracy speed is 8μm / min, and the accuracy thickness ranges from 210μm + film thickness to 170μm + film thickness; when polishing, mechanical polishing is performed first, and then chemical polishing; polishing thickness ranges from 170μm + film thickness to 160μm + film thickness Thickness, the process of preventing chip warpage is adopted in the process of wafer thinning. Use DISC 3350 dicing machine to dicing the thinned wafers, set anti-fragmentation and anti-crack scribing optimization parameters through DOE optimization, scribing feed speed 8mm / s, clean and dry in time after scribing; take Stamped multi-row silver-plated lead frame with anti-spill film attached ...

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PUM

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Abstract

The invention provides an ultrathin VSOP (very thin small outline package) packaging part and a production method thereof. The packaging part comprises a carrier, an IC chip, a bonding line, an inner pin and connecting feet. Each of two side surfaces of the carrier is provided with three semicircular grooves, wherein the two side surfaces are oriented to the inner pin; a back side of the carrier is provided with a plurality of depressions which are arranged in a matrix type manner, so that a bonding force between a plastic-sealed body and the back side and the side surfaces of the carrier; and four connecting feet extends from each of two sides of the plastic-sealed body. The production of the ultrathin VSOP packaging part comprises the following steps such as wafer thickness reduction, scribing, core loading, pressure welding, plastic package and post curing, reinforcement cutting, printing, electroplating, and punching separating through a punching divided type entering tube method; the pressure welding is realized by a spun gold bonding low radian control technology; a camber is controlled through a combination of a flat arc, a front flapping and a reverse flapping and through a high-grade bank shape of a sharp corner and a flat corner; and a punching filament rate is guaranteed. The packaging part uses the special carrier and the pin design structure; the product reliability is improved; the MSL1 reliability requirement is met; and the packaging yield rate is quite high.

Description

technical field [0001] The invention belongs to the technical field of electronic information automation component manufacturing, and relates to a package, in particular to an ultra-thin VSOP package; the invention also relates to a production method of the ultra-thin VSOP package. Background technique [0002] Integrated circuit Corde (IC) packaging is a new technology introduced to China in the past 20 years. It encapsulates integrated circuit IC chips with storage and computing functions in a plastic material, making it a carrier that can store, reprint, transmit, and process data. The cost of IC packages is generally higher than that of magnetic cards, but they have large capacity, small size, light weight, strong anti-interference ability, easy to carry, easy to use, better confidentiality, and long service life. In the past 10 years, the growth rate of the industry market has been maintained at 15% to 20% every year. Due to its advantages of large information storage,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/495H01L21/56
CPCH01L2224/32245H01L2224/45144H01L2224/48091H01L2224/48247H01L2224/73265H01L2224/97H01L2924/00014H01L2924/00H01L2924/00012
Inventor 蔺兴江陈志祥慕蔚何文海
Owner TIANSHUI HUATIAN TECH
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