Iii-nitride metal insulator semiconductor field effect transistor

Abstract

A field effect transistor (FET) includes a Ill-Nitride channel layer, a III -Nitride barrier layer on the channel layer, wherein the barrier layer has an energy bandgap greater than the channel layer, a source electrode electrically coupled to one of the Ill-Nitride layers, a drain electrode electrically coupled to one of the Ill- Nitride layers, a gate insulator layer stack for electrically insulating a gate electrode from the barrier layer and the channel layer, the gate insulator layer stack including an insulator layer, such as SiN, and an AlN layer, the gate electrode in a region between the source electrode and the drain electrode and in contact with the insulator layer, and wherein the AlN layer is in contact with one of the III- Nitride layers.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Application No. 61 / 513426, filed July 29, 2011, which is incorporated herein by reference in its entirety. This application is related to US Patent Application No. 12 / 909,497, filed October 21, 2010, which was issued as US Patent No. 8,124,505 on February 28, 2012. technical field [0003] The present invention relates to a III-nitride field effect transistor (FET), in particular to [0004] Device structure and fabrication method of Metal Insulator Semiconductor Field Effect Transistor. Background technique [0005] Due to the excellent material properties of GaN, transistors fabricated from it are suitable for high voltage, high temperature and high speed operation. A key application of GaN transistors is in the fabrication of switching devices capable of controlling the flow of electrical power. For power switching applications, there is a strong demand to use no...

AI Technical Summary

Problems solved by technology

As discussed above, despite many years of research, it has not been successful to achieve both low gate leakage current and low interfacial trap density as shown by threshold voltage hysteresis, maximum drain current density and off-state drain leakage current, especially in normally closed transistor

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