Shallow groove isolation structure forming method

Abstract

A shallow groove isolation structure forming method comprises providing a semiconductor substrate; forming into a substrate oxidation layer on the semiconductor substrate; forming into a mask layer on the substrate oxidation layer; etching the mask layer and forming into an opening which penetrates through the mask layer; performing oxidation treatment on the lateral wall of the opening and forming into an oxidation layer; etching the oxidation layer, the mask layer, the substrate oxidation layer and the semiconductor until the remaining partial thickness mask layer and the oxidation layer which is arranged on the lateral wall of the mask layer and forming into an isolation groove; forming into a shallow groove isolation structure inside the isolation groove. The shallow groove isolation structure forming method has the advantages of avoiding a groove is formed in a joint between the shallow groove isolation structure and the semiconductor, improving the shape of the formed shallow groove isolation structure and accordingly improves the electrical performance of a semiconductor device which comprises the formed shallow groove isolation structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a shallow trench isolation structure. Background technique [0002] As semiconductor technology enters the deep sub-micron era, components below 0.18 microns (such as between active regions of CMOS integrated circuits) mostly use shallow trench isolation structures (STI) for lateral isolation. [0003] The shallow trench isolation structure is a device isolation technology, and its specific process includes: reference figure 1 , providing a semiconductor substrate 101, on which a pad oxide layer 103, a hard mask layer 105, and a mask layer 109 are sequentially formed on the semiconductor substrate 101 from bottom to top, and a hard mask layer exposed in the mask layer 109 is formed. The opening 111 of the mold layer 105, the opening 111 has a shape corresponding to the isolation structure defining the active region; refer to figure 2 ,by figure 1 T...

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Problems solved by technology

[0004] However, the shallow trench isolation structure 115b formed through the above process is prone to grooves 117 at the joints with the pad oxide layer 103 and the semiconductor substrate 101, resulting in the "narrow-width effect" of the formed semiconductor device. (narrow width effect) and the formed PMOS transistors are prone to leakage, which seriously affects the electrical performance of the semiconductor device including the above-mentioned shallow trench isolation structure 115b

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