K-value and ten-value signal controlled data distributor and data selector
A technology of data distributor and data selector, which is applied in the direction of digital transmission system, safety communication device, pulse technology, etc., and can solve the problems of large hysteresis voltage, leakage of floating gate capacitance, control threshold, etc.
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Embodiment 1
[0036] Embodiment 1: Description of the PMOS tube band-pass, high-pass and low-pass variable threshold circuit functions of the present invention:
[0037] Refer to the relevant content of the following two patents: [1] Patent No. 201110291038.5 'PMOS tube bandpass-band-resistance and high-pass-low pass variable threshold circuit' (invention content, drawings and embodiment 1, etc.), [2] The patent No. 201110280921.4 is the patent '8-value information refreshing method and related circuit of 8-value storage unit embedded in DRAM memory matrix' (accompanying drawings and embodiment 4, etc.), according to the characteristics of the present invention, PMOS tube band-pass, high-pass and low-pass The variable threshold circuit is described as follows:
[0038] [1] PMOS tube with pass-variable threshold circuit: According to the characteristics of the patent of the present invention only using high pass-variable threshold circuit, at first patent [1] or [2] Figure 6 The band-pass-...
Embodiment 2
[0044] Embodiment 2: K logic value discrimination gate U 0 ~ U L instruction of:
[0045] K logical value discrimination gate U 0 ~ U L Among them, K-2 U 1 ~ U L-1 Respectively, K-2 band-pass variable threshold PMOS transistors P with the smallest intervals b1 ~P bL-1 And K-2 constant current sources I 1 ~I L-1 make up, u L A high-pass variable-threshold PMOS transistor P with the smallest interval bL and a constant current source I L make up, u 0 A low-pass variable-threshold PMOS transistor P with the smallest interval b0 and a constant current source I 0 Composition, the smallest low-pass, band-pass and high-pass variable threshold PMOS transistor P in all intervals b0 ~P bL The effective inputs of all are connected to the control input con; the logic value of the input con and x is i respectively expressed as con=i and x=i, the noise-free logic level of the input and output logic value i is called i level, con and x The i levels of x are denoted as V con (...
Embodiment 3
[0048] Example 3: to figure 1 and 2 Pspice computer simulation waveform Figures 9 to 14 instruction of.
[0049] figure 2 Be the circuit diagram of the data selector of 10 value signal control of the present invention; To figure 2 (10 value data selector) carry out Pspice computer simulation, ① draw at first Figure 9 , Figure 9 for figure 2 The circuit shown is under the action of the control input con, 10 data inputs x 0 ~x L The working waveform diagram transmitted to the data output y, the order of waveforms from top to bottom is: y, con, x 9 、x 8 、x 7 、x 6 、x 5 、x 4 、x 3 、x 2 、x 1 、x 0 ;Depend on Figure 9 It can be seen that when con is a stable 0 level, y=x 0 , that is, input x 0 Transfer to output y; when con is a stable 1 level, y=x 1 , namely x 1 Transfer to y; when con is a stable 2-level, y=x 2 , namely x 2 Transfer to y; when con is a stable 3-level, y=x 3 , namely x 3 Send to y;...; When con is a stable 8-level, y=x 8 , namely x ...
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