Low subthreshold swing high withstand voltage insulated gate tunneling transistor and method of making the same

Abstract

The invention relates to a low sub-threshold swing high withstand voltage insulated gate tunneling transistor. A withstand voltage layer structure with low impurity concentration is introduced into the collector junction and the emitter junction to improve the forward and reverse withstand voltage capabilities of the device. The extremely sensitive correlation between the resistance through the insulating layer and the electric field strength in the tunneling insulating layer enables lower subthreshold swing and better switching characteristics. By using the tunneling current generated on the insulating tunneling layer as the driving current of the collector current, better forward current conduction characteristics are achieved compared with common semiconductor band-to-band tunneling field effect transistors. The invention also proposes a specific manufacturing method of the low sub-threshold swing high withstand voltage insulated gate tunneling transistor. Therefore, the working characteristic of the nanoscale integrated circuit unit is significantly improved, and it is suitable for popularization and application.

Description

[0001] Technical field: [0002] The invention relates to the field of ultra-large-scale integrated circuit manufacturing, and relates to a low subthreshold swing, high withstand voltage insulating gate tunneling transistor and a manufacturing method thereof, which are suitable for manufacturing high-performance ultra-high integrated integrated circuits. [0003] Background technique: [0004] At present, the continuous shortening of the channel length of integrated circuit unit metal oxide semiconductor field effect transistors (MOSFETs) has led to the increase of the subthreshold swing of the device, which has brought about serious degradation of switching characteristics and a significant increase in static power consumption, etc. short channel effect. Although the degradation of the device performance can be alleviated by improving the gate electrode structure, when the device size is further reduced to below 50 nm, even with the optimized gate electrode structure, the subt...

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Problems solved by technology

However, this approach not only increases the production cost, but also increases the difficulty of the process.

In addition, the use of high dielectric constant insulating materials as the insulating dielectric layer between the gate and the substrate can only improve the control ability of the gate to the electric field distribution of the channel, but cannot essentially increase the tunneling probability of silicon materials, so The improvement of electrical characteristics such as sub-threshold slope conduction current is very limited

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