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Semiconductor device and preparation method thereof, and electronic device

A semiconductor and device technology, applied in the field of semiconductor devices and their preparation, can solve problems such as increased leakage, dose loss, and B doping loss mismatch performance.

Inactive Publication Date: 2016-10-05
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] FINFET devices have excellent channel control ability and short channel effect, but in Bulk FINFET, because the bottom is easy to penetrate, the short channel effect is enhanced and the leakage is increased
There are many methods in the prior art to improve the performance of semiconductor devices, such as performing multiple ion implantation steps in the manufacturing process of semiconductor devices, including the formation of well regions and channel blocking ion implantation by ion implantation. B or BF 2 Ion implantation, but B ions are easily diffused into the shallow trench isolation oxide. The loss of B doping and the decrease in mismatch performance are due to the diffusion of punchthrough imp doping into the channel of the FINFET device. It will reduce the mismatch performance caused by random doping fluctuation (Random Doping Fluctuation, RDF); in addition, after forming the fin of FinFET, it is necessary to implement channel stop implantation to control the partial depletion caused by the bottom of the fin. source / drain punch-through
If the implanted ions for channel stop implantation are boron ions or boron fluorine ions, boron ions or boron fluoride ions are easy to diffuse to the isolation structure during the subsequent heat treatment, resulting in a dose of boron ions or boron fluoride ions located in the channel region Loss, does not play a role in controlling source / drain punch-through

Method used

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  • Semiconductor device and preparation method thereof, and electronic device
  • Semiconductor device and preparation method thereof, and electronic device
  • Semiconductor device and preparation method thereof, and electronic device

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Embodiment 1

[0047] In order to solve the problems in the prior art, the present invention provides a method for manufacturing a semiconductor device. The method will be further described below in conjunction with the accompanying drawings. in, Figures 1a-1e It is a schematic diagram of the manufacturing process of the semiconductor device described in the embodiment of the present invention.

[0048] First, step 201 is performed to provide a semiconductor substrate 101 on which a pad oxide layer 102 is formed.

[0049] Such as Figure 1a As shown, in this step, the semiconductor substrate 101 can be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc.

[0050] Next, a pad oxide layer (Pad oxide) 102 is formed on the semiconductor substrate 101, wherein the formation method of the pad oxide layer (Pad oxide...

Embodiment 2

[0077] The present invention also provides a semiconductor device, which is prepared by the method described in Embodiment 1.

[0078] The semiconductor device includes:

[0079] semiconductor substrate 101;

[0080] a plurality of fin structures located in the semiconductor substrate;

[0081] a punch-through stop layer located in the channel region in the fin structure;

[0082] The diffusion stop layer 106 is located above the punch-through stop layer in the fin structure.

[0083] Wherein, the diffusion stop layer is a carbon diffusion stop layer, which is formed by carbon ion implantation and located in the fin structure.

[0084] Optionally, the semiconductor device further includes an isolation oxide layer, the isolation oxide layer is located on the semiconductor substrate and covers the middle and bottom of the fin structure.

[0085] Optionally, the upper surface of the isolation oxide layer is flush with the upper surface of the diffusion stop layer.

[0086] O...

Embodiment 3

[0089] The present invention also provides an electronic device, including the semiconductor device described in Embodiment 2. Wherein, the semiconductor device is the semiconductor device described in Embodiment 2, or the semiconductor device obtained according to the preparation method described in Embodiment 1.

[0090] The electronic device of this embodiment can be any electronic product or equipment such as mobile phone, tablet computer, notebook computer, netbook, game console, TV set, VCD, DVD, navigator, camera, video recorder, voice recorder, MP3, MP4, PSP, etc. , can also be any intermediate product including the semiconductor device. The electronic device according to the embodiment of the present invention has better performance due to the use of the above-mentioned semiconductor device.

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PUM

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Abstract

The present invention relates to a semiconductor device and a preparation method thereof, and an electronic device. The semiconductor device comprises: a semiconductor substrate; a plurality of fin structures located on the semiconductor substrate; a break-through stop layer located in channel regions in the fin structures; and a diffusion stop layer located in the fin structures and breaking through the top of the break-through stop layer. A carbon diffusion stop layer is introduced to prevent a channel stop layer from ion injecting and diffusing to a channel so as to avoid the decreasing of the mismatch performance of the semiconductor device caused by random doping fluctuation (RDF); and moreover, the carbon diffusion stop layer is helpful for reducing the loss of the ion injection B doping of the NMOS break-through stop layer.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular, the present invention relates to a semiconductor device, a preparation method thereof, and an electronic device. Background technique [0002] With the continuous development of semiconductor technology, in order to improve the performance of the device, the size of integrated circuit devices needs to be continuously reduced. With the continuous reduction of the size of CMOS devices, the development of three-dimensional designs such as fin field effect transistors (FinFET) has been promoted. [0003] Compared with the existing planar transistors, the FinFET device has superior performance in terms of channel control and short channel effect reduction; the planar gate structure is arranged above the channel, and the gate in the FinFET The fins are arranged around the fins, so static electricity can be controlled from three sides, and the performance in static electricity contro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/66795
Inventor 周飞
Owner SEMICON MFG INT (SHANGHAI) CORP