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A kind of semiconductor device and its manufacturing method and electronic device

A manufacturing method and technology of electronic devices, applied in the direction of semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problems of increased resistance and poor filling ability of trenches and contact holes, and achieve low-resistance electron mobility , reduced power consumption, and high electron mobility

Active Publication Date: 2019-06-28
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The material of the barrier layer is generally TaN and Ta. Since the filling ability of the PVD process is relatively poor, if a barrier layer of a certain thickness is to be grown on the sidewall of the trench and the contact hole, then the trench and the contact hole A part of the barrier layer will also grow at the bottom of the contact hole, and the barrier layer formed at the bottom of the trench and the contact hole is undesirable because the barrier layer at the bottom of the trench and the contact hole will cause The resistance of the trench and the contact hole increases

Method used

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  • A kind of semiconductor device and its manufacturing method and electronic device
  • A kind of semiconductor device and its manufacturing method and electronic device
  • A kind of semiconductor device and its manufacturing method and electronic device

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Experimental program
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Embodiment 1

[0042] Firstly, step 301 is performed to form a first contact hole, a second contact hole and a trench in the low-K material dielectric layer by using a photolithography process and an etching process.

[0043] Such as Figure 2A As shown, a semiconductor substrate (not shown in the figure) is provided, and an etch stop layer 200, a low-K dielectric material layer 201, and a mask stack are sequentially formed on the semiconductor substrate.

[0044] Specifically, the semiconductor substrate may be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI) , silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc.

[0045] Wherein, the etch barrier layer 200 is used to protect the underlying substrate and active devices. In a specific embodiment of the present invention, the etch barrier layer 200 can be a nitrogen doped silicon carbide layer NDC (Nitrogen dop...

Embodiment 2

[0071] The present invention also provides a semiconductor device, the semiconductor device is prepared by the method in Embodiment 1, the semiconductor device prepared by the method reduces the contact hole resistance, and further improves the performance and yield of the semiconductor device .

Embodiment 3

[0073] The present invention further provides an electronic device including the aforementioned semiconductor device. Or it includes a semiconductor device manufactured by a method of the embodiment.

[0074] The electronic device also has the above-mentioned advantages due to the higher performance of the included semiconductor devices.

[0075] The electronic device can be any electronic product or equipment such as a mobile phone, a tablet computer, a notebook computer, a netbook, a game console, a TV set, a VCD, a DVD, a navigator, a camera, a video camera, a recording pen, MP3, MP4, PSP, or the like. is any intermediate product comprising said semiconductor device. The electronic device has better performance due to the use of the semiconductor device.

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Abstract

The invention relates to a semiconductor device and a manufacturing method thereof and an electronic device. The method comprises the steps that a semiconductor substrate is provided; a low-K dielectric material layer is formed on the semiconductor substrate and a metal layer is also formed in the low-K dielectric material layer; a first contact hole and a second contact hole are formed in the low-K dielectric material layer to expose the metal layer; a first barrier layer and a second barrier layer are sequentially deposited in the first contact hole and the second contact hole; the bottom parts of the first contact hole and the second contact hole are bombarded by utilizing an inert gas; and a third barrier layer is formed through deposition in the first contact hole and the second contact hole. By the method, the resistance of the contact hole with relatively small contact area with the lower metal layer and the contact hole with relatively large contact area is reduced; meanwhile, the performance of the electron mobility of the device is not affected; and the power consumption of the semiconductor device is finally reduced.

Description

technical field [0001] The present invention relates to the field of semiconductors, and in particular, the present invention relates to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] As semiconductor manufacturing technology becomes more and more sophisticated, integrated circuits are also undergoing major changes. The number of components integrated on the same chip has increased from the initial dozens or hundreds to the current millions. In order to meet the requirements of circuit complexity and circuit density, the manufacturing process of semiconductor integrated circuit chips uses batch processing technology to form various types of complex devices on the substrate and connect them to each other to have complete electronic functions. A dielectric layer is used as a dielectric material to isolate each metal interconnection between the wires, and the interconnection structure is used to provide wiring bet...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
Inventor 刘继全
Owner SEMICON MFG INT (SHANGHAI) CORP