Grooved PCB structure used for bare chip testing and manufacturing method thereof

Abstract

The invention provides a grooved PCB structure used for bare chip testing and a manufacturing method thereof. The manufacturing method comprises the following steps: firstly machining a PCB, forming a groove of which the area and the shape are the same as those of a bare chip in the PCB, and machining a diversion trench and a bonding pad; then adding an insulating dielectric layer between two PCBs, and laminating the two PCBs, wherein no bonding pad is machined on the surface opposite to the two PCBs; using a drilling tool to form connecting through holes in the laminated PCBs; finally adhering a bare chip at the position of the groove, and adopting an ultrasonic-thermocompression welding bonding technology to complete golden wire bonding between metal PAD of the bare chip and the bonding pad on the PCBs. The structure is simple, low in cost and easy to machine, the design difficulty of the PCB is reduced, and the pollution for the metal PAD of the bare chip when a conducting resin overflows can be preferably avoided.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit testing, in particular to a PCB board structure used for bare chip testing and a manufacturing method thereof. Background technique [0002] At present, after the chip tape-out is completed, the bare chip must be packaged in plastic material or ceramic material to provide environmental protection before it can be soldered on the PCB board for testing. As the competition in the electronic product market becomes more and more fierce, chip manufacturers need to launch chip products at a faster speed to occupy the early market and strive for more profits. However, the packaging cycle will take up valuable testing time and slow down the pace of product marketization. Wafer-level testing can test bare chips through wafer probes and special test benches, but only relatively simple testing tasks can be completed, and there are many limitations in testing the actual functions of chips. The...

AI Technical Summary

Problems solved by technology

The current PCB boards are mostly used to carry the packaged chips, and there is no PCB board design and processing specifically for carrying bare chip tests.

And the larger the area of ​​the bare chip, the more conductive glue is needed for direct bonding on the PCB. If too much glue is used, when the bare chip is pressed on the PCB, the conductive glue will be on the side of the bare chip. Spilling, it is easy to adhere to the metal PAD of the bare chip, causing a short circuit between the metal PADs, resulting in the scrapping of the bare chip

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