A kind of manufacturing method of power mosfet with backside corrosion oxide layer technology
A technology of backside corrosion and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of warping and deformation of wafers, and the inability of lithography machines to absorb chips, etc., so as to solve warping deformation, good Generalization and applicability, effect of increasing roughness
Active Publication Date: 2020-02-14
CHONGQING ZHONGKE YUXIN ELECTRONICS
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Problems solved by technology
[0006] The purpose of the present invention is to solve the problems in the prior art, such as warping and deformation of the wafer, inability of the lithography machine to absorb the wafer and sliding of the equipment cavity during the processing of the power MOSFET.
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[0046] The present invention will be further described below in conjunction with the examples, but it should not be understood that the scope of the subject of the present invention is limited to the following examples. Without departing from the above-mentioned technical ideas of the present invention, various replacements and changes made according to common technical knowledge and conventional means in this field shall be included in the protection scope of the present invention.
[0047] Such as image 3 Shown is the process module of the backside etching oxide layer used in the present invention, with a bonding protection layer (NECK area) low-precipitated SiO 2 and dielectric buffer layer low-precipitated SiO 2 Schematic diagram of the manufacturing process of the power MOSFET; specific:
[0048] A method for manufacturing a power MOSFET with a backside corrosion oxide layer process, which is characterized in that it includes a substrate material 1, an epitaxial layer ...
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Abstract
The invention discloses a power MOSFET manufacturing method with the back corrosion oxidation layer technology. After the steps of depositing SiO2 through a bonding protection layer (NECK region) and depositing SiO2 through a dielectric buffering layer, the back corrosion oxidation layer technology is added, and is used for removing a back oxidation layer of a wafer and reducing the stress of the wafer. The method effectively solves a problem of warped deformation, caused by the stress imbalance, of the wafer, and effectively solves a problem that a photoetching machine system cannot absorb the wafer because of the warped deformation of the wafer. Meanwhile, the method can reduce the sliding piece fragment risks caused by the smooth back surface during the work time of the wafer when an ECHUCK cavity is employed subsequently. The method is better in popularization performance and applicability, and can be widely used for the field of power MOSFET manufacturing and other machining processes.
Description
technical field [0001] The invention relates to the field of semiconductor device manufacturing, in particular to a method for manufacturing a power MOSFET with a backside corrosion oxide layer process. Background technique [0002] In the field of power MOSFET device manufacturing, more conventional manufacturing processes usually require thick-field oxygen growth, polycrystalline deposition, dielectric layer deposition, metal thin film sputtering and other major thick-film processes. Among them, low starch SiO 2 The process is widely used for its step coverage and shape retention. For some high-reliability MOSFETs, in order to avoid damage to the active area device under the bonding point when the silicon-aluminum wire is bonded to the chip during the packaging process, a low-temperature deposition of SiO will be added during the processing process. 2 , Through layout design and photolithography, a thick oxygen bonding protection area is designed under the bonding point ...
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IPC IPC(8): H01L21/336
CPCH01L29/66477
Inventor 肖添王鹏飞李光波李孝权胡镜影唐仕伟唐昭焕王斌吴雪杨永晖
Owner CHONGQING ZHONGKE YUXIN ELECTRONICS