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Direct band gap ge channel nmos device induced by sigec stress and its preparation method

A direct and channel technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as forming NMOS devices

Active Publication Date: 2020-02-07
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At the same time, after forming the direct bandgap Ge material, there is still the problem of how to form NMOS devices based on the direct bandgap Ge

Method used

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  • Direct band gap ge channel nmos device induced by sigec stress and its preparation method
  • Direct band gap ge channel nmos device induced by sigec stress and its preparation method
  • Direct band gap ge channel nmos device induced by sigec stress and its preparation method

Examples

Experimental program
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Effect test

Embodiment 1

[0074] See figure 1 , figure 1 A process flow chart of a SiGeC stress-introduced direct bandgap Ge channel NMOS device provided by an embodiment of the present invention. The method comprises the steps of:

[0075] Step a, selecting a single crystal Si substrate;

[0076] Step b. growing a first Ge layer on the surface of the Ge substrate at a first temperature;

[0077] Step c, growing a second Ge layer on the surface of the first Ge layer at a second temperature;

[0078] Step d, growing a gate dielectric layer and a gate layer continuously on the surface of the second Ge layer, and using an etching process to selectively etch the gate dielectric layer and the gate layer to form an NMOS gate;

[0079] Step e, forming a gate protection layer on the surface of the NMOS gate;

[0080] Step f, etching the second Ge layer to form a Ge step at the position of the NMOS gate;

[0081] Step g, using an epitaxial process to grow Si on the surface of the second Ge layer 0.24 Ge ...

Embodiment 2

[0108] See Figure 3a-Figure 3r , Figure 3a-Figure 3r The process diagram of a SiGeC stress-introduced direct bandgap Ge channel NMOS device provided by the embodiment of the present invention is based on the above embodiments, and this embodiment will introduce the process flow of the present invention in more detail. The method includes:

[0109] S101. Substrate selection. Such as Figure 3a As shown, the single crystal silicon (001) with a thickness of 2 μm is selected as the substrate 001, the initial doping type is n-type, and the concentration is 10 15 cm -3 .

[0110] S102. Two-step growth of germanium epitaxial layer:

[0111] S1021. Using a chemical vapor deposition (CVD) method, grow an n-type Ge(001) thin film on the substrate by a two-step method of low temperature and high temperature, with a doping concentration of 1×10 16 ~5×10 16 cm -3 ;

[0112] S1022, such as Figure 3b As shown, a 50 nm-thick "low temperature" Ge ((LT-Ge) film 002 was grown at 27...

Embodiment 3

[0134] A direct bandgap Ge channel NMOS device provided by an embodiment of the present invention includes: a single crystal Si substrate layer, a first Ge layer, a second Ge layer, and a Si 0.24 Ge 0.73 C 0.03 layer, GeO 2 Passivation layer, HfO 2 A gate dielectric layer and a TaN gate layer; wherein, the SiGeC stress-introduced direct bandgap Ge channel NMOS device is formed by the method described in the above-mentioned embodiments.

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Abstract

The invention discloses a direct band gap Ge channel NMOS device with SiGe introduced stress and preparation method for the same. The preparation method for the direct band gap Ge channel NMOS devicewith SiGec introduced stress comprises steps of choosing a monocrystalline Si substrate, growing a first Ge layer, growing a second Ge layer, continuously growing a gate medium layer and a gate layer,using an etching technology to selectively etch the fate medium layer and the gate layer to form a gate, forming a gate protection layer on the surface of the gate, etching the second Ge layer to form Ge steps at the position of an NMOS gate, adopting an epitaxial technology to grow an Si0.24Ge0.73C0.03 layer on the surface of the second Ge layer, removing the gate protection layer, using the ionimplantation technology to form an NMOS source drain electrode and finally forming an NMOS device. The invention uses the direct band gap Ge material as the channel of the NMOS device to improve thechannel carrier mobility of the NMOS device, improves a current driving capability, improves working speed of the NMOS device and makes frequency characteristics of the NMOS device better. Meanwhile,the direct band gap Ge channel NMOS device has an advantage of monolithic photoelectricity integration.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a SiGeC stress-introduced direct bandgap Ge channel NMOS device and a preparation method thereof. Background technique [0002] Integrated Circuit (IC, Integrated Circuit) has developed rapidly at an unprecedented pace since its appearance, and now integrated circuits have become the core of the electronic information industry. The development of technology and technology has made the integration of integrated circuits higher and higher, and the feature size has become smaller and smaller. On the one hand, the performance of integrated circuits has been greatly improved and the cost of chips has been reduced; on the other hand, with the continuous improvement of integrated circuit integration and the continuous shrinking of feature sizes, a series of materials, device physics, device structures and processes have emerged. technical issues. In particular, the problem...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/66H01L29/16H01L21/02
Inventor 吴翼飞宋建军宣荣喜蒋道福胡辉勇张鹤鸣
Owner XIDIAN UNIV