Method for manufacturing trench MOSFET

Abstract

The invention discloses a method for manufacturing a trench MOSFET. The method comprises the steps of forming an epitaxial semiconductor layer on a semiconductor substrate; forming a trench, which extends from the first surface to the interior of the epitaxial semiconductor layer, in the epitaxial semiconductor layer; forming a first insulating layer and a shielding conductor on the lower part ofthe trench; and forming a body region, a source region and a drain electrode, wherein in a step of forming a second insulating layer, the second insulating layer is patterned by a hard mask which at least partially fills the upper part of the trench; and the step of forming the second insulating layer comprises the steps of forming a conformal second insulating layer on the upper part of the trench, wherein the second insulating layer covers the upper part side wall of the trench and the top of the shielding conductor; filling the upper part of the trench with a polysilicon layer; by taking the polysilicon layer as the hard mask, performing etching to remove the part, positioned on the upper part side wall of the trench, of the second insulating layer; and removing the polysilicon layer. The technological steps for forming the trench MOSFET in the prior art are simplified, so that production cost is lowered.

Description

technical field [0001] The present invention relates to semiconductor technology, and more particularly, to a method of manufacturing trench MOSFETs. Background technique [0002] Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) have been widely used as power semiconductor devices, for example as switches in power converters. [0003] Among them, the advantage of the shielded gate trench MOSFET over the traditional MOSFET is that the shielded electrode reduces the gate-drain capacitance and improves the cut-off voltage of the transistor. The gate electrode and the shield electrode are insulated from each other by a dielectric layer, also known as an inter-electrode dielectric or IED. The IED must be of sufficient mass and thickness to support potential differences that may exist across the shield and gate electrodes. Furthermore, interface and dielectric trap charges at and in the interface between the shield electrode and the IED layer are primarily related to...

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Problems solved by technology

The method of depositing plasma oxide film is cumbersome, complicated to operate, and high in production cost

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