Silicon-oxide-nitride-oxide-silicon (SONOS) device and manufacturing method thereof

Abstract

The invention discloses a silicon-oxide-nitride-oxide-silicon (SONOS) device. A first grid structure of a select gate of a memory unit is formed in a shallow groove, a second gate structure of a memory tube and a second channel region at the bottom are formed at a second side of the first gate structure, only two source-drain injection regions are arranged at two sides of the first gate structureand the second gate structure, the memory unit can be of a 1.5T-shaped structure, so that the area of the device can be reduced; a first poly-silicon gate and a second poly-silicon gate of the first gate structure are not overlapped in a longitudinal direction and in a transverse direction, electric leakage between the first poly-silicon gate and the second poly-silicon gate can be reduced, the power consumption of the device is reduced, the reliability of the device is improved, the quality requirement of an insulation layer between the first poly-silicon gate and the second poly-silicon gateis reduced, and mutual interference among the first poly-silicon gate and the second poly-silicon gate can be prevented. The invention also discloses a manufacturing method of the SONOS device.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a SONOS device; the invention also relates to a SONOS device and a manufacturing method thereof. Background technique [0002] SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) non-volatile memory with low operating voltage and better CMOS process compatibility is widely used in various embedded electronic products such as financial IC cards, automotive electronics and other applications. At present, the commonly used memory cell structure consists of a complete storage tube and a complete select-gate (SG) to form a 2-transistor structure (2transistors, 2T), that is, a 2T-type SONOS non-volatile memory, and each transistor has a complete source Pole, drain and gate, and two transistors share a layer of polysilicon. The threshold voltage (Vt) of the storage transistor in the depletion-type SONOS non-volatile memory is less than 0, and the Vt of the selectio...

AI Technical Summary

Problems solved by technology

And by figure 2 As shown, it can be seen that the polysilicon gates 1 and 1a are adjacent to each other in the lateral direction and their sides overlap vertically, and the polysilicon gates 1 and 1a are separated by sidewalls composed of oxide layer 24 and nitride layer 25, and the voltage difference pair of 11.7V is composed of The sidewall material isolated between polysilicon gate 1 and 1a puts forward very high requirements, and long-term high voltage will degrade the performance of the device and affect the reliability of the device

in addition, figure 2 The shown back-to-back structure composed of polysilicon gates 1 and 1a is also prone to leakage and mutual interference defects between polysilicon gates 1 and 1a, which will affect the performance and reliability of the device

Images