High-power vertical tile type multi-channel digital transceiving sub-array designing method
A design method and high-power technology, applied to the design of two-dimensional active digital phased array radar transceiver components or transceiver sub-arrays, in the field of radar, to achieve superior platform adaptability, efficient transmission, and reduce tile volume effects
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[0022] Now in conjunction with embodiment, accompanying drawing, the present invention will be further described:
[0023] The principle block diagram of the high-power vertical tile-type multi-channel digital transceiver sub-array described in the present invention is as follows image 3 As shown, the uplink baseband signal is phase-controlled by the FPGA, the system clock signal and the local oscillator signal LO to generate a transmission excitation signal through the SOC, and sent to the antenna radiation unit through the power amplifier, circulator and RF filter; the target received by the antenna is reflected back to the The wave signal is sent to the SOC with low noise through the radio frequency filter, circulator, and limiter, and the digital receiving signal is generated by down-conversion and other processing with the local oscillator signal LO inside the SOC.
[0024] The vertical tile-type integration method described in the present invention requires that the tra...
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