An enhanced HEMT device having a P-type buried layer structure and a preparation method thereof

Abstract

The invention relates to an enhanced HEMT device with a P-type buried layer structure and a preparation method thereof, belonging to the field of semiconductor transistor device manufacture. The technical points include: growing a buffer layer, i-GaN drift lay, barrier lay and gate passivation layer on a semiconductor substrate in sequence, an active electrode and a drain electrode are arranged onthe i-GaN drift layer, a gate electrode is arranged on the gate passivation layer, and a P-type buried layer is embedded in GaN drift layer. The P-type buried layer is used to form the built-in electric field in the PN junction, which depletes the two-dimensional electron gas beneath the grid and achieves the purpose of enhancement. The invention has the advantages that the enhanced HEMT device with P-type buried layer structure and the preparation method thereof can simultaneously improve the stable and uniform forward threshold voltage of the device without degradation of the conductivity of the two-dimensional electronic gas channel, and is an important technical supplement to the field.

Description

technical field [0001] The invention belongs to the field of manufacturing semiconductor transistor devices, in particular to an enhanced HEMT device with a P-type buried layer structure and a preparation method thereof. Background technique [0002] Since the end of the 20th century, after the first generation of semiconductors represented by Si and the second generation of semiconductors represented by GaAs, the third generation of semiconductor materials has developed rapidly. The third-generation semiconductor materials have excellent physical and chemical properties, and have been widely used in wireless communications, satellites, lighting and other fields in recent years. The more representative materials are GaN and SiC. The third-generation semiconductor is also called a wide bandgap semiconductor, which has a wider bandgap, generally greater than 2eV, a higher breakdown field strength, a higher thermal conductivity and a higher electron saturation rate, so it has ...

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Problems solved by technology

However, these methods have some unavoidable defects: the surface unevenness caused by barrier layer etching will enhance the impurity scattering of electrons in the channel, resulting in a decrease in channel electron mobility and degradation of on-state resistance; the injection barrier layer The fluorine ions in the fluorine ion have temperature instability, so the threshold voltage drifts with temperature, which reduces the reliability of the device; the insertion of the P-GaN cap layer increases the distance between the gate and the channel, which weakens the gate control ability of the device , leading to the degradation of the device transconductance, thereby reducing the switching rate of the device

Since the above three methods all perform additional process steps on the gate barrier layer above the channel, additional defects and impurities are introduced, so the conductivity of the two-dimensional electron gas channel is degraded, and the on-resistance of the device is increased.

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