Encapsulated antenna and manufacture method thereof

Abstract

The invention relates to a packaged antenna and a manufacturing method thereof. The packaged antenna comprises a circuit chip; A substrate provided with a substrate groove, the circuit chip is fixed in the substrate groove, the front surface of the circuit chip is exposed to the first surface and is flush with the first surface, the substrate is provided with a substrate metal layer, and the substrate metal layer is formed with an antenna; Rewiring layer, laminated on the first surface of the substrate and the front surface of the circuit chip, the rewiring layer includes at least one RDL metal layer, The metal layer is formed with a reflective ground plane, a feeder line, a plurality of fan-out leads and a plurality of pads, the feeder line being connected to the circuit chip to feed theantenna, the plurality of fan-out leads connecting corresponding vias to the circuit chip for connecting the circuit chip and the printed circuit board, the plurality of pads being located on a layerof RDL metal layer furthest from the second surface; And solder balls. With the above technical solution, the encapsulated antenna provided by the present disclosure can reduce its own parasitic parameters while improving antenna performance.

Description

Technical field [0001] The present disclosure relates to the technical field of packaged antennas, and in particular, to a packaged antenna and a manufacturing method of the packaged antenna. Background technique [0002] With the development of science and technology in recent decades, millimeter waves have gradually developed in the direction of civil miniaturization and multi-function, and have been widely used in automotive radar, high-speed data communications, industrial automation sensors, and medical equipment. The antenna is an important component in the wireless system, and there are two forms of separation and integration. The integrated antenna includes two types: Antenna-on-Chip (AoC) and Antenna-in-Package (AiP). On-chip antenna technology integrates antennas and other circuits on the same chip through semiconductor materials and processes. The advantage is high integration, no additional interconnections, and low parasitic effects, especially for terahertz frequen...

AI Technical Summary

Problems solved by technology

For millimeter-wave chip AiP packaging, the traditional packaging technology is to fan out the MMIC chip and integrate it into the AiP system, but this will increase the parasitic parameters of the interconnection

[0008] In addition, many manufacturers currently provide fan-out packaging processes, such as Infineon's eWLB (embedded Wafer Level Ball gridarray, embedded wafer-level ball grid array packaging), TSMC's InFO-WLP, etc., but do not provide process Customized service

Taking the eWLB process as an example, the package structure manufactured by the eWLB process has only one RDL rewiring layer. When implementing AiP, if the RDL metal layer is used to form the antenna pattern, it is impossible to make a reflective ground plane on the eWLB package, and only a PCB can be used. (Printed Circuit Board, printed circuit board) The wiring layer on the ground plane needs to carefully optimize the PCB structure to cooperate with the antenna design, which brings trouble to the application and increases the application cost

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