A NAND Memory Array Based on Inversion Mode Resistive Field Effect Transistor

Abstract

The invention discloses a NAND memory array based on an inversion mode resistive field effect transistor. The array includes a plurality of memory cells arranged in a matrix, and the memory cells are inversion mode resistive field effect transistors: in the row direction, each The memory cells in the row are connected through the gate, and are connected to the word line together, and the selected memory cell is read, written and erased by controlling the potential of the word line; in the column direction, the memory cells in the first row to the last row of each column The drain and the source are connected sequentially, the source of the memory cells in the first row is led to the source bit line, and the drain of the memory cells in the last row is led to the drain bit line; the array is based on transistors that can adjust the resistance state of the gate oxide. The gate leakage of the transistor is different, and the resistance state of the transistor can be judged by the magnitude of the gate current when the transistor is turned off, so the erasing, writing and reading of data can be realized. The invention can effectively simplify the process, reduce the preparation cost and reduce the power consumption, and the invention is compatible with the standard CMOS process.

Description

technical field [0001] The invention belongs to the technical field of semiconductors and integrated circuits, and in particular relates to an electrically programmable, readable and erasable NAND memory array based on an inversion mode resistive field effect transistor. Background technique [0002] On the one hand, non-volatile memory (Non-volatile Memory, NVM), such as resistive random access memory (Resistive Random Access Memory, RRAM) and magnetic random access memory (Magnetic Random Access Memory, MRAM), because of its fast operation speed, function Due to the advantages of low power consumption, high reliability and good size reduction ability, it is proposed that it can be applied to high-density storage and system-on-chip. However, compared with traditional flash memory (Flash), these non-volatile memories cannot realize logic control by themselves, and require additional transistors to assist in information storage and extraction, which will not only increase the...

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Problems solved by technology

However, compared with traditional flash memory (Flash), these non-volatile memories cannot realize logic control by themselves, and require additional transistors to assist in information storage and extraction, which will not only increase the complexity of circuit design but also increase process costs.

[0003] On the other hand, in memory circuits based on metal oxide semiconductor field effect transistors (Metal Oxide Semiconductor Field Effect Transistor, MOSFET), mainstream memory technologies such as Flash have problems such as high operating voltage, slow speed, poor endurance, and difficulty in size reduction.

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