System-level packaging process for radio frequency chip
A technology of system-level packaging and radio frequency chips, which is applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of increasing process difficulty and high-frequency signal interference, and achieve the effect of simplifying the process and protecting the integrity
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[0050] 201) making TSV, RDL, and metal bumps 103 on the base 101;
[0051] like Figure 4 As shown, TSV holes are formed on the surface of the base 101 by photolithography and etching processes. The diameter of the TSV holes ranges from 1um to 1000um, and the depth of the TSV holes ranges from 10um to 1000um; an insulating layer such as silicon oxide or silicon nitride is deposited on the base 101, or directly Thermal oxidation, the thickness of the insulating layer ranges from 10nm to 100um; a seed layer is made on the insulating layer by physical sputtering, magnetron sputtering or evaporation process, the thickness of the seed layer ranges from 1nm to 100um, which can be one layer or It can be multi-layer, and the metal material can be titanium, copper, aluminum, silver, palladium, gold, thallium, tin, nickel, etc.;
[0052] By electroplating copper, the copper metal is filled with the TSV hole 202 to form a copper column, which is densified at a temperature of 200 to 500 ...
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