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SiC MOSFET power device and preparation method thereof

A technology of power devices and trenches, which is applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of power module overall size and economic cost increase, long reverse recovery time, poor reverse conduction characteristics, etc., to reduce the overall Effects of size and economic cost, reduction of electric field strength, and reduction of reverse conduction voltage drop

Inactive Publication Date: 2019-10-18
上海功成半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a SiC MOSFET power device and its preparation method, which are used to solve the poor reverse conduction characteristics of the existing SiC MOSFET power devices, such as the required reverse conductivity. The conduction voltage drop is large, the reverse recovery time is long, etc., and the introduction of external devices will lead to an increase in the overall size and economic cost of the power module, and when the device is in the blocking state, it will introduce excessive electric field strength in the gate dielectric layer , leading to problems such as device failure due to gate dielectric layer breakdown

Method used

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  • SiC MOSFET power device and preparation method thereof
  • SiC MOSFET power device and preparation method thereof

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Embodiment 1

[0086] Such as figure 1 As shown, the present invention provides a SiC MOSFET power device, including: a substrate 101 of a first conductivity type; an epitaxial layer 103 of the first conductivity type located on the surface of the substrate 101, the epitaxial layer 103 and the The material of the substrate 101 includes SiC; the trench 104 ( figure 1 Not marked in), located in the epitaxial layer 103, the upper opening of the trench 104 is larger than the lower opening so that the trench 104 has an inclined slope; the gate dielectric layer 110 is located on the side of the trench 104 The wall and bottom surface; the gate conductive layer 111 is located on the surface of the gate dielectric layer 110 and fills the trench 104; the well region 106 of the second conductivity type is located in the epitaxial layer 103 and is located in the trench On the periphery of the trench 104, the second conductivity type is different from the first conductivity type; the source region 107 of t...

Embodiment 2

[0099] Such as Figure 2 to Figure 13 As shown, the present invention also provides a method for preparing a SiC MOSFET power device, which can be used to prepare the SiC MOSFET power device in the first embodiment, so the description of the SiC MOSFET power device in the first embodiment is fully applicable to this embodiment For example, similarly, the description of the same structure in this embodiment also applies to the first embodiment. For the sake of brevity, this embodiment will minimize repetitive introductions. For details, please refer to the description in Embodiment 1.

[0100] Please refer to figure 2 , The preparation method includes the steps:

[0101] S1: Provide a substrate 101 of the first conductivity type, and form an epitaxial layer 103 of the first conductivity type on the surface of the substrate 101, and the materials of the epitaxial layer 103 and the substrate 101 both include SiC;

[0102] S2: forming a trench 104 in the epitaxial layer 103, the upper ...

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Abstract

The invention provides a SiC MOSFET power device and a preparation method thereof. The device comprises a substrate, an epitaxial layer, a trench, a gate dielectric layer, a gate conductive layer, a well region, a source region, a body contact region, an SBD diode region, a front metal layer and a drain metal layer, wherein the epitaxial layer is positioned on the surface of the substrate; the trench is located in the epitaxial layer, and the upper opening of the trench is larger than the lower opening of the trench; the gate dielectric layer is positioned on the side wall and the bottom surface of the trench; the gate conductive layer is located on the surface of the gate dielectric layer and fills the trench; the well region is located in the epitaxial layer and is located on the periphery of the trench; the source region is located in the well region; the body contact region is located in the well region; the SBD diode region is located in the epitaxial layer. According to the device, the structure of a traditional SiC MOSFET power device is optimized, so that the conduction resistance and the conduction power consumption of the device can be reduced, and the device can also have a relatively low input capacitance, the switch speed of the device is increased, the power consumption of the switch is reduced, the reverse conducting capability of the device is improved, and theoverall size and the economic cost of the power module are reduced. The structure and the method are simple, and a wide application prospect is achieved.

Description

Technical field [0001] The present invention relates to the field of semiconductor device manufacturing, in particular to a SiC MOSFET power device and a preparation method thereof. Background technique [0002] In order to cope with the increasingly serious global energy crisis and environmental pollution problems, it is imperative to develop energy-saving, environmentally friendly and miniaturized power supply systems. The "central processing unit" known as power electronic devices-power switching devices restrict the miniaturization of power supply systems The main factor of development. Silicon Carbide (SiC), as a wide band gap semiconductor material, belongs to the third-generation semiconductor material system. Compared with silicon materials, it has a larger band gap, higher critical breakdown electric field strength, Faster electron saturation drift speed and higher thermal conductivity and other excellent properties, so it is very suitable for preparing high-power, high...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423H01L29/06H01L29/10
CPCH01L29/78H01L29/42356H01L29/0611H01L29/1037
Inventor 王中健肖兵黄肖艳徐大朋
Owner 上海功成半导体科技有限公司
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