A split-gate 4h-sic VDMOS device
A split gate and device technology, which is applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of low reliability of body diodes, increase the complexity of circuit design, and cost, and achieve the effect of suppressing pinch-off, improving dynamic performance, Effect of Cgd reduction
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[0030] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.
[0031] Such as figure 1 As shown, a split gate 4H-SiC VDMOS device provided by an embodiment of the present invention includes: a drain 1, an N+ substrate 2, an N- epitaxial layer 3, a P well 4, a first N+ region 5, and an N+ source region 6 , P+ contact region 7, gate oxide layer 8, gate 9, Schottky contact 10, source 11, SiO 2 interlayer dielectric 12 and JFET region 13;
[0032] The drain 1, the N+ substrate 2 and the N- epitaxial layer 3 are sequentially stacked from bottom to top;
[0033] The JFET region 13 is located on the upper layer of the N- epitaxial layer 3;
[0034] The P well 4 is located on the upper layer of the N- epitaxial layer 3 and on both sides of the JFET region 13, the first N+ region 5 i...
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