Method of preparing three-dimensional super-stretchable crystalline nanowire

Abstract

The invention relates to a method of preparing a three-dimensional super-stretchable crystalline nanowire, which comprises the following steps of: (1) depositing an insulating dielectric layer on a substrate as a sacrificial layer by using PECVD or PVD, (2) defining a periodic step edge pattern by using photoetching and electron beam direct writing, and etching the dielectric layer by using a drymethod or wet method alternate etching process to form vertical step side walls, 3) treating the surface of the step with corrosive liquid to form a wavy step, 4) defining a pattern vertical to the step by photoetching electron beam direct writing or a mask plate technology again, and preparing a secondary guide channel vertical to the step by an etching technology, 5) locally depositing a strip-shaped catalytic metal layer through a photoetching, evaporation or sputtering process, (6) converting the catalytic metal layer into separated metal nanoparticles, and (7) reducing the temperature tobe lower than the melting point of the catalytic metal particles, depositing and covering an amorphous semiconductor precursor film layer on the surface of the whole structure, depositing crystallinenanowires, and enabling the nanowires to grow along the guide channel of a wavy step.

Description

technical field [0001] The invention relates to a method for obtaining super-stretchable crystalline nanowires (nanowire) by channel guiding technology, in particular to a method for forming large-area, easy-to-locate wave-shaped guiding channels by using two etching processes. Background technique [0002] Semiconductor crystalline silicon nanowire (Nanowire) is the core material of modern microelectronics technology due to its high carrier mobility and the ability to achieve efficient, stable and reliable doping processes. Here, the inventor of the present application is the earliest A planar solid-liquid-solid (IP SLS) growth mode is proposed, in which amorphous silicon is used as a precursor, and crystalline silicon nanowire structures are grown by absorbing amorphous silicon with low melting point metal indium and tin nanoparticles. At the same time, three-dimensional nano-steps can be prepared by using two-time etching technology, and the steps are used as a guide. The...

AI Technical Summary

Problems solved by technology

[0003] However, the natural rigidity of many materials severely limits the emerging new flexible and stretchable electronic devices. Therefore, it is very important to control the morphology of crystalline nanowires to make them super stretchable.

Since the planar crystalline nanowires are greatly constrained by the substrate, the relaxation space is reduced, and it is very easy to cause the nanowires to be broken during the stretching process, making it difficult to prepare reliable flexible electronic devices.

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