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Preparation method of silicon carbide MOS capacitor gate oxide layer

A technology of gate oxide layer and silicon carbide, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc., can solve the problems of low efficiency of the interface and gate oxide layer, achieve good annealing effect, high efficiency, and increase annealing temperature Effect

Inactive Publication Date: 2020-09-29
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0006] In order to overcome the shortcomings and deficiencies of the above-mentioned preparation methods, the present invention provides a method for preparing the gate oxide layer of a silicon carbide MOS capacitor device. By prolonging the annealing time, the nitrogen element density at the interface is effectively increased to improve the efficiency of the interface and the gate oxide layer. Poor technical issues

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  • Preparation method of silicon carbide MOS capacitor gate oxide layer
  • Preparation method of silicon carbide MOS capacitor gate oxide layer
  • Preparation method of silicon carbide MOS capacitor gate oxide layer

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Embodiment Construction

[0027] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0028] At present, the problem of the gate oxide layer of SiC MOS devices is the main reason hindering the commercialization of SiC MOSFET devices. Therefore, it is necessary to develop a mature and repeatable gate oxide preparation method. Due to the complicated process of silicon carbide MOSFET devices, the cost and cycle are long, so The s...

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Abstract

The invention discloses a preparation method of a gate oxide layer of a silicon carbide MOS capacitor. The preparation method comprises the following steps: providing a SiC epitaxial wafer; cleaning the SiC epitaxial wafer; carrying out oxidation treatment on the cleaned SiC epitaxial wafer, forming a SiO2 gate oxide layer of a SiC MOS capacitor on the upper surface of the epitaxial wafer, and forming a lower surface SiO2 oxide layer on the lower surface of the epitaxial wafer; carrying out annealing treatment on the oxidized SiC epitaxial wafer; forming a metal upper electrode on the surfaceof the annealed upper surface SiC MOS capacitor gate oxide layer; and etching the lower surface oxide layer to form a metal lower electrode. By increasing the annealing temperature in the annealing treatment step, the interface defect density and the reliability of the gate oxide layer are optimized, the process is simple, the efficiency is high, and the cost is low.

Description

technical field [0001] The invention relates to the technical field of semiconductor power devices, in particular to a method for preparing a gate oxide layer of a silicon carbide MOS capacitor device. Background technique [0002] Compared with the first-generation semiconductor represented by silicon and the second-generation semiconductor represented by gallium arsenide, the third-generation semiconductor material SiC has a larger forbidden band width and a higher critical breakdown field strength; For silicon power devices under these conditions, the withstand voltage of SiC is about 100 times that of silicon materials, especially the Schottky Barrier Diode (SBD) and junction barrier Schottky diode ( Junction Barrier Schottky, JBS) structure products, the withstand voltage range has reached 600V-1700V. At the same time, SiC has high thermal conductivity and low intrinsic carrier concentration, and can withstand a junction temperature of about 600°C, which greatly increa...

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Application Information

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IPC IPC(8): H01L29/94H01L21/329H01L21/28
CPCH01L29/6606H01L29/94H01L21/28008
Inventor 葛念念许恒宇万彩萍王世海罗志鹏金智
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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