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Gallium nitride enhancement mode device and manufacturing method thereof

A manufacturing method and enhanced technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as gate instability, conduction voltage variation, process complexity, etc., to achieve the solution of conduction voltage And the effects of reliability instability, reduced on-resistance, and high performance

Active Publication Date: 2022-06-21
宁波铼微半导体有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In order to overcome the problems existing in the related technologies at least to a certain extent, the purpose of this application is to provide a gallium nitride enhancement device and its manufacturing method, which can solve the problem of existing gate electrodes in the enhancement mode operation of the existing gallium nitride devices. Problems of instability and process complexity are likely to cause serious on-voltage changes and reliability problems

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  • Gallium nitride enhancement mode device and manufacturing method thereof

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Embodiment 1

[0070] Growth was performed by metal organic chemical vapor deposition (MOCVD) on a low resistivity 6-inch silicon-based (111) p-type substrate 1 . For the consideration of high breakdown voltage, a 4 μm thick AlN nucleation layer and a carbon-doped GaN buffer layer were first grown on the substrate 1 . Then a 300 nm undoped gallium nitride channel layer 3 is grown, followed by 3 nm undoped Al 0.25 For the ultra-thin AlGaN barrier layer 4 of GaN, a 1 nm GaN cap layer is grown again, so that the ultra-thin AlGaN barrier layer 4 is sandwiched between the 1 nm GaN cap layer and the GaN channel layer 3 . A gallium nitride cap layer is used to prevent oxidation of the ultra-thin AlGaN barrier layer 4 .

[0071] A 100-nm-thick silicon oxide mask layer was deposited by plasma-enhanced chemical vapor deposition (PECVD) on the gallium nitride cap layer, and the regeneration zone was patterned using a dilute HF wet etch solution.

[0072] Use low damage SF 6 +BCl 3 The mixed gas rem...

Embodiment 2

[0076]Growth was performed by metal organic chemical vapor deposition (MOCVD) on a low resistivity 6-inch silicon-based (111) p-type substrate 1 . For the consideration of high breakdown voltage, a 5 μm thick AlN nucleation layer and a carbon-doped GaN buffer layer were first grown on the substrate 1 . Then a 300 nm undoped gallium nitride channel layer 3 is grown, followed by 3 nm of undoped Al 0.22 For the ultra-thin AlGaN barrier layer 4 of GaN, a 1 nm GaN cap layer is grown again, so that the ultra-thin AlGaN barrier layer 4 is sandwiched between the 1 nm GaN cap layer and the GaN channel layer 3 . A gallium nitride cap layer is used to prevent oxidation of the ultra-thin AlGaN barrier layer 4 .

[0077] A 120-nm-thick silicon oxide mask layer was deposited by plasma-enhanced chemical vapor deposition (PECVD) on the gallium nitride cap layer, and the regeneration zone was patterned using a dilute HF wet etch solution.

[0078] Use low damage SF 6 +BCl 3 The mixed gas r...

Embodiment 3

[0082] Growth was performed by metal organic chemical vapor deposition (MOCVD) on a low resistivity 6-inch silicon-based (111) p-type substrate 1 . For the consideration of high breakdown voltage, a 4 μm thick AlN nucleation layer and a carbon-doped GaN buffer layer were first grown on the substrate 1 . Then a 300nm undoped gallium nitride channel layer 3 is grown, followed by 5nm undoped Al 0.22 For the ultra-thin AlGaN barrier layer 4 of GaN, a 1 nm GaN cap layer is grown again, so that the ultra-thin AlGaN barrier layer 4 is sandwiched between the 1 nm GaN cap layer and the GaN channel layer 3 . A gallium nitride cap layer is used to prevent oxidation of the ultra-thin AlGaN barrier layer 4 .

[0083] A 100-nm-thick silicon oxide mask layer was deposited by plasma-enhanced chemical vapor deposition (PECVD) on the gallium nitride cap layer, and the regeneration zone was patterned using a dilute HF wet etch solution.

[0084] Use low damage SF 6 +BCl 3 The mixed gas remov...

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Abstract

The present application relates to a gallium nitride enhanced device and its manufacturing method, including a substrate, a nucleation buffer layer, a gallium nitride channel layer, an ultra-thin aluminum gallium nitride barrier layer, a gallium nitride cap layer, a re-growth layer, Silicon nitride insulating layer, drain, source and gate; remove the first part of the gallium nitride cap layer by etching process, and use metal organic chemical vapor deposition to grow AlGaN re-growth layer; in the gallium nitride cap layer The second part and AlGaN re-growth layer are deposited by low-pressure chemical vapor deposition of a silicon nitride insulating layer containing a high proportion of silicon. A high proportion silicon-based silicon nitride insulating layer grown by a low-pressure chemical vapor deposition system to absorb oxygen atoms on the surface of the native AlGaN barrier layer, thereby reducing the oxygen-contaminated area between the SiN / AlGaN interface , and reduce the on-resistance by growing the AlGaN layer again.

Description

technical field [0001] The present application relates to the field of semiconductor technology, and more particularly, to a gallium nitride enhancement mode device and a manufacturing method thereof. Background technique [0002] Based on Gallium Nitride High Electron Mobility Transistor (GaN HEMT), it is realized for switching power electronic devices due to its wide band gap, high electron speed and high current density, and is widely used in fast charging, power supply, energy-saving chip key devices . Since GaN devices are inherently depleted-mode operation, which is not conducive to use, in order to realize the enhancement-mode operation of the GaN HEMT structure, several common methods include: (1) gate etching; (2) P-type GaN epitaxial structure; (3) Ion implantation. Among them, gate etching does not require additional masks, and the process is simple, but there is plasma damage, the current is too small, and the etching depth is difficult to control; the critical...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/778H01L21/335H01L29/20H01L29/06
CPCH01L29/778H01L29/66462H01L29/2003H01L29/0603
Inventor 王祥骏彭立仪邱昭玮邱显钦敖金平
Owner 宁波铼微半导体有限公司