Folded gate gallium oxide-based field effect transistor
A gallium oxide base field and transistor technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of poor compatibility between vertical power devices and processes, and difficult integration, and achieve low on-resistance and high threshold voltage.
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Embodiment 1
[0023] Such as figure 1 As shown, it includes a substrate layer 1, a buffer layer 2 located on the upper surface of the substrate layer 1, and an epitaxial layer 3 located on the upper surface of the buffer layer 2; along the lateral direction of the device, one end of the upper part of the epitaxial layer 3 has a source region 4, and the other end There is a drain region 5, the upper surface of the source region 4 partially covers the source metal 6, and the upper surface of the drain region 5 partially covers the drain metal 7; the epitaxial layer 3 between the source region 4 and the drain region 5 has The gate region, which is not in contact with the source region 4 and the drain region 5, is characterized in that, along the longitudinal direction of the device, the gate region is composed of two or more groove-shaped regions with the same depth and arranged at equal intervals The upper surface of the epitaxial layer 3 between the groove wall, the groove bottom and the gro...
Embodiment 2
[0027] Such as Figure 7 As shown, the difference between this embodiment and Embodiment 1 is that the top of the source metal 6 extends toward the direction of the drain metal 7, partially covers the passivation dielectric layer 10 and ends at the passivation between the gate metal 8 and the drain metal 7. The upper surface of the dielectric layer 10 is not in contact with the gate metal 8 and the drain metal 7 to form a source field plate, modulate the electric field distribution, and increase the breakdown voltage of the device.
Embodiment 3
[0029] Such as Figure 8 As shown, the difference between this embodiment and Embodiment 1 is that the top of the gate metal 8 extends toward the direction of the drain metal 7 and does not contact the drain metal 7, and the extension part of the gate metal 8 and the epitaxial layer 3 There is a passivation dielectric layer 10 between them to form an extended gate field plate. In the forward direction, the surface of the epitaxial layer under the extended grid field plate forms an electron accumulation layer, which further reduces the on-resistance; in the reverse direction, the extended grid field plate not only modulates the electric field distribution to increase the breakdown voltage of the device, but also has auxiliary power consumption As a result, the doping concentration of the epitaxial layer of the device can be increased to help reduce the on-resistance of the device.
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