Electrostatic protection device

Abstract

The invention discloses an electrostatic protection device, which is formed by an LDMOS (Laterally Diffused Metal Oxide Semiconductor), and the LDMOS comprises a first high-voltage well region with second conduction type doping and a second high-voltage well region with first conduction type doping; the gate structure covers the surface of the selected region of the first high-voltage well region and extends to the upper part of the surface of the second high-voltage well region; the source region is formed in the surface region of the first high-voltage well region outside the first side surface of the gate structure; a heavily doped first diffusion region of a second conductive type is also formed in the surface region of the first high-voltage well region between the second side surface of the source region and the first side surface of the gate structure; a drain region is formed in the second high-voltage well region outside the second side surface of the gate structure; the first diffusion region is of a floating structure; a parasitic triode is formed by a source region, a first high-voltage well region comprising a first diffusion region, a second high-voltage well region and a drain region, and the first diffusion region is used for increasing the width and concentration of a base region of the parasitic triode. According to the invention, the maintaining voltage after the snapback of the LDMOS can be improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to an electrostatic protection (ESD) device. Background technique [0002] Such as figure 1 Shown is the application circuit diagram of the electrostatic protection device; the electrostatic protection device 102 is arranged between the input and output pads 101 and the ground, and when static electricity appears in the input and output pads 101, the electrostatic protection device 102 is triggered and discharges the static electricity, Thus, the protection of the internal circuit 103 is realized. [0003] Conventional high-voltage ESD devices generally use LDMOS. Such as figure 2 Shown is a schematic cross-sectional structure diagram of an existing electrostatic protection device; figure 2 The circuit 102 shown adopts a high-voltage LDMOS structure, and a body region 202 composed of a high-voltage well region of the second conductivity type and a drift region 203 composed...

AI Technical Summary

Problems solved by technology

However, the maintenance voltage (Vh) of pure SCR structure after snapback (snapback) generally does not exceed 10V, and there is a greater risk of latchup in high-voltage port applications, that is, when the power supply voltage of the high-voltage port is greater than the SCR maintenance Latch-up effect is prone to occur when the voltage

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