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High electron mobility transistor device and test method thereof

A technology of high electron mobility and testing methods, which is applied in the field of high electron mobility transistor devices and their testing, can solve problems affecting device frequency characteristics, shortening the source-drain spacing, limiting high-voltage and high-power applications of devices, etc., to improve efficiency, Improvement of breakdown characteristics and suppression of electric field distribution

Pending Publication Date: 2022-05-13
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

One of the problems faced by GaN-based HEMT devices is the impact of high electric field strength, especially as the device enters millimeter-wave band applications, the source-drain spacing of the device is further shortened, and the increase in the peak electric field of the gate foot severely limits the high-voltage and high-power applications of the device.
The conventional way to suppress the electric field strength is to introduce a field plate structure, but for millimeter wave devices, the introduction of the field plate structure will bring a huge parasitic capacitance, which will seriously affect the frequency characteristics of the device, which is very important for realizing high frequency and high power devices Adverse

Method used

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  • High electron mobility transistor device and test method thereof
  • High electron mobility transistor device and test method thereof
  • High electron mobility transistor device and test method thereof

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preparation example Construction

[0063] In yet another embodiment of the present disclosure, a method for manufacturing a high electron mobility transistor device is provided, the process of which is as follows Figure 9 As shown, the preparation method specifically includes:

[0064] S1, growing a source, a drain, and a gate on the second semiconductor layer, wherein the gate is located between the source and the drain, and the source and the drain form an ohmic contact;

[0065] S2, depositing and forming a passivation layer between the above-mentioned source electrode and the above-mentioned drain electrode by using a plasma-enhanced chemical vapor deposition method;

[0066] S3, using a dry ICP method to etch and form grooves on the passivation layer;

[0067] S4, forming a field plate structure on the groove by using multi-layer glue photolithography, then evaporating the metal, and peeling off to obtain the field plate structure;

[0068] S5, use Ti / Ni / Ti / Au / Ti metal stacking to form a peripheral Pad ...

Embodiment

[0076] The structure of the HEMT device is as Figure 4 As shown, specifically, it includes a substrate 1, a first semiconductor layer 2; an insertion layer 3, a second semiconductor layer 4, a cap layer 5, a source 6, a drain 7, a gate 8, a passivation layer 9, and a field plate 10. Groove 11, nucleation layer 12, source test Pad13, drain test Pad14, gate test Pad15, field plate test Pad16.

[0077] Specifically, the aforementioned substrate 1 is a SiC substrate, the aforementioned first semiconductor layer 2 is a GaN layer with a thickness of 2.5 μm, the aforementioned insertion layer 3 is an AlN layer with a thickness of 1 nm, and the aforementioned second semiconductor layer 4 is AlGaN with a thickness of The above-mentioned cap layer 5 is a GaN layer with a thickness of 1 nm; the above-mentioned source electrode 6 and the above-mentioned drain electrode 7 are formed by stacking titanium layers, aluminum layers, nickel layers and gold layers, and the above-mentioned source...

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Abstract

The present disclosure provides a high electron mobility transistor device and a test method, the device comprising: a source (6) connected with a source test electrode layout (13); a drain (7) connected to the drain test electrode layout (14); a gate (8) located between the source (6) and the drain (7) and connected to a gate test electrode layout (15); the field plate (10) is positioned between the grid electrode (8) and the drain electrode (7) and is connected with the field plate test electrode layout (16); wherein the source electrode test electrode layout (13), the drain electrode test electrode layout (14), the grid electrode test electrode layout (15) and the field plate test electrode layout (16) are electrically insulated from one another. According to the device, bias can be separately added to a radio frequency signal and a direct current signal, so that the power efficiency characteristic of the device is improved; in addition, the field plate is biased in different states and has different suppression effects on the under-gate electric field, the working voltage of the device is improved, and high-power application is further realized.

Description

technical field [0001] The present disclosure relates to the field of electronic information technology, in particular to a high electron mobility transistor device and a testing method thereof. Background technique [0002] GaN-based high electron mobility transistor (High Electron Mobility Transistor, HEMT) devices are the core devices of power amplifiers. At present, GaN-based devices have entered the research of millimeter-wave bands, and the application fields of devices have been further expanded, which puts forward higher requirements for device performance. One of the problems faced by GaN-based HEMT devices is the impact of high electric field strength, especially as the device enters millimeter-wave band applications, the source-drain spacing of the device is further shortened, and the increase in the peak electric field of the gate foot severely limits the high-voltage and high-power applications of the device. . The conventional way to suppress the electric fiel...

Claims

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Application Information

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IPC IPC(8): H01L29/778H01L29/40H01L29/417H01L29/423H01L21/66
CPCH01L29/778H01L29/402H01L29/41758H01L29/42316H01L22/30H01L22/14
Inventor 张昇魏珂陈晓娟刘新宇
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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