Pre-anneal of cosi, to prevent formation of amorphous layer between ti-o-n and cosi

US20050070098A1Inactive Publication Date: 2005-03-31GLOBALFOUNDRIES INC

Patent Information

Authority / Receiving Office
US ยท United States
Current Assignee / Owner
GLOBALFOUNDRIES INC
Publication Date
2005-03-31
Estimated Expiration
Not applicable ยท inactive patent

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Abstract

The present invention provides a method for forming an interconnect to a cobalt or nickel silicide having a TiN diffusion barrier. The inventive method comprises providing an initial structure having vias to exposed silicide regions positioned on a substrate; annealing the initial structure in a nitrogen-containing ambient, wherein a nitrogen passivation layer is formed atop the exposed silicide region; depositing Ti atop the nitrogen passivation layer; annealing the Ti in a nitrogen-containing ambient to form a TiN diffusion barrier and an amorphous Ti cobalt silicide between the TiN diffusion layer and the cobalt or nickel silicide and depositing an interconnect metal within the vias and atop the TiN diffusion barrier. The nitrogen passivation layer substantially restricts diffusion between the Ti and silicide layers minimizing the amorphous Ti cobalt silicide layer that forms. Therefore, the amorphous Ti cobalt or Ti nickel silicide is restricted to a thickness of less than about 3.0 nm.
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Description

FIELD OF INVENTION

[0001] The present invention relates to semiconductor devices and a method of manufacture, more particularly to an improved via interconnect to a silicide region. BACKGROUND OF THE INVENTION

[0002] Barrier layers and silicide layers are often an integral part of semiconducting devices. Materials which function as barriers to metal diffusion may be incorporated in metal interconnect structures that are part of integrated circuits (ICs). Barriers to metal diffusion are typically required to generate reliable devices, since low-k interlayer dielectrics typically do not prohibit metal diffusion.

[0003] Silicide contacts are of specific importance to IC's, including complementary metal oxide semiconductor (CMOS) devices because of the need to reduce the electrical resistance of the many Si contacts, at the source / drain and gate regions, in order to increase chip performance. Silicides are metal-silicon compounds that are thermally stable and provide for low electrical ...

Claims

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