CMOS image sensor with compact pixel layout
a pixel layout and image sensor technology, applied in the field of image sensors, can solve the problems of large pixel arrays and large overall area, and achieve the effect of increasing compactness and conversion gain performan
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Benefits of technology
Problems solved by technology
Method used
Image
Examples
first embodiment
[0028]FIG. 3 is an electrical schematic diagram of dual pixel unit 300 whose layout is illustrated in FIG. 5 in accordance with the invention. The electrical schematic diagram shown in FIG. 3 more clearly illustrates the electrical connections between the electrical components depicted in the layout illustrated in FIG. 5. The component names are common in both figures and will be used in the description of the operation of the dual pixel unit 300. FIG. 3 depicts a set of two transfer transistors (TXa, TXb), each coupled to respective photodiodes (PDa, PDb) and coupled to and sharing a floating drain (FD) for accumulating and transferring an image charge in response to light incident upon the photodiodes. Also residing on pixel unit 300 are a reset transistor (RST) and an amplifier transistor (SF) for converting the image charge to an image signal (PIXO) for coupling out of pixel unit 300. A power supply provides voltage VDD to both reset transistor RST and source follower transistor...
second embodiment
[0029]FIG. 4 is an electrical schematic diagram of dual pixel unit 400 whose layout is illustrated in FIG. 6 in accordance with the invention. The electrical schematic diagram shown in FIG. 4 more clearly illustrates the electrical connections between the electrical components depicted in the layout illustrated in FIG. 6. The component names are common in FIGS. 3, 4, 5, and 6, and will be used in the description of the operation of the pixel unit. FIG. 4 illustrates a pixel unit 400 like that illustrated in FIG. 3 with the addition of a signal dynamic range enhancing feature based on modifying conversion gain. Pixel unit 400 includes Double Conversion Gain capability as provided by dynamic range enhancement capacitor Cdcg and capacitor control transistor DCG. By switching in capacitor Cdcg through the action of capacitor control transistor DCG the pixel unit conversion gain is modified to accommodate higher or lower illumination incident of the photodiodes leading to increased dynam...
third embodiment
[0035]FIG. 7 is an electrical schematic diagram of dual pixel unit 700 whose layout is illustrated in FIG. 9 in accordance with the invention. The electrical schematic diagram shown in FIG. 7 more clearly illustrates the electrical connections between the electrical components depicted in the layout illustrated in FIG. 9. The component names are common in both figures and will be used in the description of the operation of the pixel unit. FIG. 7 depicts a set of two pairs of transfer transistors (TXa and TXb, TXc and TXd), each pair of transistors coupled to respective photodiodes (PDa and PDb, PDc and PDd). Each pair of transfer transistors are also coupled to and sharing a floating drain (FD1 and FD2) for accumulating and transferring an image charge in response to light incident upon the photodiodes. Also residing on pixel unit 700 are a reset transistor (RST) and an amplifier transistor (SF) for converting the image charge to an image signal (PIXO) for coupling out of pixel unit...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More