15results about How to "Reduce equivalent resistance" patented technology

The invention discloses a network layout design method based on Samsung 4nm, and relates to the technical field of semiconductor layout design. Comprising the following steps: selecting two layers of topmetal to construct a power ground network; a power supply layer and a ground layer are overlapped, the power supply layer is connected with a power supply to form a low-impedance power supply network, and the ground layer is grounded to form a low-impedance ground network; uniformly distributed power supply ground voltage stabilizing capacitors are formed between the power supply layer and the ground layer, and the ground layer is connected with a ground network; according to the invention, the two layers of top metal are arranged in an overlapped manner, so that a low-impedance power ground network and a voltage stabilizing capacitor which are uniformly distributed are formed, a low-impedance grounding network is provided, and noise interference is effectively reduced; a power ground network is constructed, low impedance is achieved, a power ground with higher quality is provided, electromagnetic interference is better restrained through a large number of evenly-distributed shielding networks, and the circuit is protected against the influence of external electromagnetic interference.

This invention discloses a high-speed current sampling circuit based on a buck converter. The high-speed current sampling circuit includes: a bias current generation unit for generating a bias current Ib; a voltage mirror unit including several MOSFETs for generating a voltage signal with equal voltage values ​​at the second node Vsw and the first node Vx based on the bias current Ib; a power transistor Mp for generating a first current Ip during the sampling phase; a sampling transistor Mps for generating a second current Ips during the sampling phase; a source follower unit including a first transistor Ms1 electrically connected between the first node Vx and a reference potential, a sixth MOSFET M6, and a seventh MOSFET M7 electrically connected between the first node Vx and the reference potential; and a sampling current output unit for outputting the sampling current Io. This invention increases the loop gain of the circuit, improves sampling accuracy, increases the non-dominant pole, improves the circuit bandwidth, and enhances the response speed.

This invention relates to a method for fabricating metal circuits on a ceramic substrate. The method involves surface treatment of aluminum nitride ceramics, selection of transition layers, and preparation of the crystal orientation of the metal layers. By fabricating a multilayer structure of insulating oxides, conductive oxides, and conductive metal layers, and introducing a Cu(111) layer, the conductivity of the thin-layer metal is enhanced. The method includes the following steps: Step 1: Cleaning the aluminum nitride ceramic substrate blank with nitric acid and / or deionized water, and performing a chemical reaction in an HF solution of appropriate concentration and at a heating temperature of appropriate degrees Celsius for a corresponding time period to prepare a buffer layer; Step 2: Preparing a multilayer structure of conductive oxides and / or conductive metal layers by magnetron sputtering; Step 3: After completing Step 2, photolithography is applied to the ceramic substrate to form a circuit pattern; Step 4: Electroplating the patterned circuit on the ceramic substrate to form an electrical connection surface layer; Step 5: Annealing the ceramic substrate after Step 4.

The application relates to a solar cell device and a preparation method thereof, the device comprising a transparent substrate, a transparent front electrode, a first insulating layer, a photoelectric conversion structure layer, a metal back electrode, a second insulating layer and a front electrode lead-out electrode arranged in sequence; the second insulating layer, the metal back electrode and the photoelectric conversion structure layer are provided with a via hole penetrating to the surface of the transparent front electrode, the front electrode lead-out electrode extends into the via hole, is electrically connected with the transparent front electrode and is electrically isolated from the metal back electrode and the photoelectric conversion structure layer; the front electrode lead-out electrode is used for guiding the carriers collected by the transparent front electrode to the outer layer of the device. Compared with a traditional solar cell, the application breaks through the limitation of the device area on the efficiency, enables the organic solar cell and the perovskite solar cell to still maintain a high efficiency under the condition of area expansion, and provides a feasible technical path for the industrialized production of a large-area flexible solar cell.

The present application provides an electrical signal sampling device, the device comprising a voltage-dividing resistor and a first active device; the first end of the voltage-dividing resistor is connected to a measured signal source; the second end of the voltage-dividing resistor is connected to the first active device and is grounded through the first active device; the second end of the voltage-dividing resistor serves as a signal sampling point of the measured signal source. By arranging an active device between the voltage-dividing resistor and the ground, the present solution can, on the one hand, utilize the power generated by the active device to increase the power of the signal sampled at the signal sampling point, and on the other hand, can further reduce the equivalent resistance between the measured signal source and the ground through the active device, thereby improving the signal-to-noise ratio of the signal sampled at the signal sampling point.

The application discloses a high-mobility silicon carbide N-type LDMOS device with reduced on-resistance, which comprises an N-type substrate, a P-type epitaxial layer arranged on the N-type substrate, an N-type well region, a first P-type heavily doped region, a first N-type heavily doped region, a second P-type heavily doped region connected to a source, a second N-type heavily doped region connected to a drain arranged in the N-type well region, the first P-type heavily doped region, the first N-type heavily doped region and the second P-type heavily doped region being connected, an oxide layer arranged on the surface of the second N-type heavily doped region, the N-type well region, the first P-type heavily doped region, the first N-type heavily doped region, the second P-type heavily doped region and the P-type epitaxial layer, a polycrystalline silicon trench gate serving as a gate of the device and extending into the P-type epitaxial layer, and an N-type buried layer arranged in the P-type epitaxial layer, one end of the N-type buried layer being connected to a channel of the device and the other end being connected to the N-type well region.

Disclosed are an electromagnetic induction heating coil and a method for manufacturing the same, the heating coil including a conductive portion that generates a magnetic field when a current passes through the conductive portion, and a cladding portion that closely winds the conductive portion from an outer periphery and defines a cross-sectional shape thereof perpendicular to a current direction, the conductive part comprises a plurality of strands of conductive wires, and is characterized in that the conductive part is limited in a space with a rectangular cross section by the coating part, the conductive wires are wires with polygonal cross sections, and the conductive wires meet the condition that C: S is greater than 45mm <-1 >. According to the heating coil, the electrified sectional area can be effectively utilized, meanwhile, the influence of the skin effect is smaller, the safe current-carrying capacity of a coil conductive wire can be effectively increased, coil heating during working of an electromagnetic induction appliance is effectively improved, and the heating coil is smaller in relative size, thinner in thickness and easier to produce and wind.

This application provides a three-dimensional memory. The three-dimensional memory includes: a memory array structure, including a first memory array structure and a second memory array structure disposed along a first direction; a bridging structure connecting the first memory array structure and the second memory array structure, including a plurality of alternately stacked dielectric layers and a plurality of conductive layers; and a plurality of dummy channel structures, each dummy channel structure passing through the bridging structure along the stacking direction of the bridging structure, and in a plane perpendicular to the stacking direction, the maximum dimension of the dummy channel structure in the first direction is greater than its maximum dimension in the second direction, and the second direction intersects with the first direction.

The invention relates to the field of electric appliances, and provides an air conditioner control method and device and an air conditioner. The method comprises the steps that a pulse width modulation (PWM) signal is output to an inverter of the compressor, so that current flows in from any phase of a three-phase winding of the compressor and flows out from the other two phases at the same time, and an oil pool is heated; acquiring the actual heating power of the motor winding in real time; according to the difference value between the actual heating power and the preset target heating power, the duty ratio of the PWM signal is dynamically adjusted, so that the actual heating power approaches the target heating power. An external heating element is not needed, so that the aging failure risk of the heating tape is avoided; meanwhile, the limitation that the iron loss heating power is low and the heating efficiency of the two-phase winding is insufficient is broken through, and the heating efficiency, the system reliability and the control precision are remarkably improved on the basis of multiplexing original hardware through three-phase winding cooperative heating and power closed-loop regulation and control.

This application provides a light-emitting diode (LED) and a light-emitting device. A first electrode is formed on one side of the first semiconductor layer of the LED. The first electrode has multiple body portions distributed on opposite sides of the LED and multiple extension portions electrically connected to the body portions. The multiple extension portions include main extension portions and secondary extension portions distributed in a first direction and a second direction. This design increases the number of body portions of the first electrode and adaptively increases the number and distribution of the extension portions, thus shortening the current conduction distance, improving current spreadability, and making the current distribution of the LED more uniform. Simultaneously, the increased number of body portions correspondingly increases the number of leads between the LED and external circuits, thereby reducing the equivalent resistance of the LED and ultimately lowering the voltage of the LED package, reducing input power, and thus improving the photoelectric conversion efficiency of the LED.

This invention discloses a frequency tuning method and resonator for a quartz crystal tuning fork oscillator. The method includes: a coating step: cleaning the quartz crystal blank and depositing a base metal layer after cleaning; a coarse tuning step: repeatedly printing conductive paste in the tuning area of ​​the tuning fork arm and curing it to form a printed tuning layer, adjusting the frequency of the tuning fork oscillator to a preset frequency range; and a fine tuning step: performing an excitation test to obtain the current frequency F1, using a laser to perform targeted ablation on the printed tuning layer, stopping when the frequency reaches the target value F2, thus completing the frequency tuning of the quartz crystal tuning fork oscillator. This invention adopts a layered coating architecture, abandoning the full vacuum process, and using a stacked structure of "one-time vacuum coating (base conductive / reflective layer) + two-time printed coating (tuning weight-adding layer)," which solves the problem of material waste and achieves nanometer-level precise frequency locking.

The application provides a pixel unit, a pixel array, an image sensor and a traffic device. The pixel unit comprises: a signal source circuit connected to a first reset power supply, configured to reset based on the first reset power supply and generate a voltage signal through photoelectric conversion; and a storage circuit connected to a second reset power supply and the signal source circuit, configured to reset based on the second reset power supply and store the voltage signal generated by the signal source circuit; wherein a signal path between the signal source circuit and the first reset power supply is independent of a signal path between the storage circuit and the second reset power supply. The application is used to reduce the charging and discharging time of the capacitor and improve the frame rate.

The invention discloses a motor control method and device, a motor and a storage medium. The method comprises the following steps: when a motor is in a dragging state, sending a first pulse width modulation signal; the duty ratio of the first pulse width adjustment signal is a first duty ratio; obtaining the working current of the motor; and detecting whether the motor is in an abnormal state based on the working current and a specified current value corresponding to the first duty ratio. As the specified current value corresponding to the first duty ratio is the current critical value of normal working of the motor under the first pulse width modulation signal of the first duty ratio, whether the current working current of the motor is too large or not can be accurately detected by judging the size relation between the working current and the specified current value corresponding to the first duty ratio, and the working efficiency of the motor is improved. And the accuracy of detecting whether the rotor is out of step is improved.

This invention relates to the field of cathode materials for aqueous zinc-ion batteries, and discloses a Ce-α-MnO2 / CNTs nanowire, its preparation method and application, an aqueous zinc-ion battery cathode sheet and its preparation method, and an aqueous zinc-ion battery. The preparation method of Ce-α-MnO2 / CNTs nanowires includes: first mixing multi-walled carbon nanotubes, trivalent cerium salt, and manganese sulfate in the presence of an inorganic solvent to obtain a mixture I; second mixing potassium permanganate solution with the mixture I to obtain product I; subjecting product I to a hydrothermal reaction to obtain product II; and drying product II to obtain Ce-α-MnO2 / CNTs nanowires. The Ce-α-MnO2 / CNTs nanowires of this invention, as a cathode material, have a high specific capacity, can improve the charge and discharge rate of aqueous zinc-ion batteries, and thus enhance the overall performance of aqueous zinc-ion batteries.

The embodiment of the invention provides a semiconductor device, a manufacturing method thereof and a memory system. The semiconductor device comprises a storage column which comprises a storage function layer and an inner electrode which are sequentially arranged from outside to inside; the channel structure is located at the end of the storage column and comprises a gate dielectric layer and a channel layer which are sequentially arranged from outside to inside, and the channel layer is connected with the inner electrode; the channel structure further comprises a first electrode, and the first electrode is located at the end, away from the storage column, of the channel structure and connected with the channel layer. The material of the channel layer comprises a metal oxide semiconductor, and the material of the first electrode and the material of the part, close to the channel layer, of the inner electrode both comprise metal.