Polycrystal collecting area invert structure SiGe hetero-junction transistor

Abstract

The invention discloses a SiGe hetero junction transistor with polycrystal collecting region inverted structure, belonging to the semiconductor device structure and fabrication technology field. After avoiding a buried layer and an N- epitaxy Si layer structure in general SiGe HBT transistor, an underlay N+ layer is directly taken as an emitting area, and then a SiGe epitaxy base region, a polycrystal Si collecting area and an electronic device structure consisting of an emitter, a base electrode and a collector are in turn made. The collecting region is positioned on the upper layer of the structure, which contributes to adopting ion injecting technique to adjust the position of B-C junction, thereby well guaranteeing the performance of device. An outside base region and the down-lead of base electrode adopt a dielectric layer to separate from the lower emitting area, which reduces capacitance and guarantees the working speed of device. The transistor with the inverted structure is suitable for forming SiGe microwave monolithic integrated circuit in a form of common emitter.

Description

technical field [0001] The invention belongs to the structure scope of semiconductor devices, in particular to a SiGe heterojunction transistor with an inverted structure in a polysilicon collection area. Background technique [0002] The NPN transistor (NPN triode) fabricated by traditional silicon bipolar process technology is shown in Figure 1. The core device part of the transistor (the part framed by a dotted line in Figure 1), from bottom to top: P-type Si substrate, collection region 3 composed of N+ type Si and N-type Si, P-type Si base region 2. N+ type Si emitter region 1. On this basis, many variants of the NPN transistor structure have been developed. For example, instead of using monocrystalline Si in the emitter region, polycrystalline Si is used instead. Such a structure is shown in Figure 2, which is a currently popular device structure. The transistor shown in Figure 2, its core device part (the part framed by the dotted line in Figure 2), from bottom to t...

AI Technical Summary

Problems solved by technology

Precise control is required for the position of the PN junction. Generally, the position of the PN junction should be placed inside the material barrier. If this is not the case, i

Images