BCD device and manufacturing method thereof

Abstract

The invention discloses a BCD device and a manufacturing method thereof, which belong to the technical field of semiconductor power devices. In the invention, semiconductor devices such as a high-voltage nLIGBT, three high-voltage nLDMOSs, a low-voltage NMOS, a low-voltage PMOS, a low-voltage NPN and the like are synchronously integrated on the same chip, wherein the high-voltage nLIGBT, the high-voltage nLDMOSs and the low-voltage NPN are directly arranged on a single-crystal p-type substrate; the low-voltage NMOS is arranged in a p-type well; and the low-voltage PMOS is arranged in an n-type epitaxial layer. As p-type reduced-field layers are respectively arranged between the n-type epitaxial layer and an n-type shift region well, the n-type epitaxial layer on a p-type buried layer supplies an extra surface conducting channel to high-voltage devices, the conducting channel is increased, the specific on resistance of the high-voltage devices is reduced, and the manufacturing cost of the chip is further reduced. The nLIGBT device and the nLDMOS devices of the invention further have the characteristics of high input impedance, low output impedance and the like, and a high-voltage power integrated circuit formed by the nLIGBT device and the nLDMOS devices can be used in a plurality of products, such as consumer electronics, display drivers and the like.

Description

technical field [0001] The invention belongs to the technical field of semiconductor power devices. Background technique [0002] The development of high-voltage power integrated circuits is inseparable from high-voltage and low-voltage semiconductor devices. High-voltage power integrated circuits often use the high analog precision of Bipolar transistors, the high integration of CMOS, and the high power or voltage characteristics of DMOS (Double-diffused MOSFET) to integrate Bipolar analog circuits, CMOS logic circuits, CMOS analog circuits and DMOS high-voltage power devices. Monolithically integrated together (referred to as BCD device). Lateral high-voltage devices are widely used in high-voltage power integrated circuits because the drain, gate, and source are all on the chip surface, and are easy to integrate with low-voltage signal circuits through internal connections. However, due to the existence of Ron∝BV between the on-resistance Ron of the DMOS device and the ...

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Problems solved by technology

However, due to the Ron∝BV2.3~2.6 relationship between the on-resistance Ron of the DMOS device and the device withstand voltage BV, the on-resistance of the device rises sharply when the device is used in high voltage, which limits the lateral high voltage. Application of DMOS devices in high-voltage power integrated circuits, especially in circuits requiring low conduction loss and small chip area

In order to overcome the problem of high on-resistance, J.A. APPLES and others proposed RESURF (Reduced SURface Field) to reduce the surface field technology, which is widely used in the design of high-voltage devices, but it still cannot effectively solve the problem of high on-resistance

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