Growing method for low-dislocation gallium nitride

A growth method, gallium nitride technology, applied in the field of semiconductor material growth, can solve problems that affect the quality of material crystals and limit the photoelectric performance of devices

Inactive Publication Date: 2012-04-11
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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Problems solved by technology

Due to the large lattice constant mismatch and thermal expansion coefficient difference between the sapphire substrate and the nitride epitaxial layer, there are large residual stress and many crystal defects in the nitride epitaxial layer, which affect the crystal quality of the material and limit the Further improvement of the optoelectronic performance of the device

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  • Growing method for low-dislocation gallium nitride
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  • Growing method for low-dislocation gallium nitride

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Embodiment Construction

[0025] see Figure 1 to Figure 4 As shown, the present invention provides a method for growing low dislocation gallium nitride, comprising the following steps:

[0026] Step 1: get a substrate, which includes a substrate 10 and a gallium nitride template 11 made thereon (see figure 1 ), the substrate here can be sapphire, SiC, Si, GaAS, GaN, and the epitaxial material on the substrate can be InP, GaAs, GaN, AlN, InN, InGaN, AlGaN, AlInN, AlInGaN and other ternary and quaternary III- Group V and IV-VI compound semiconductors.

[0027] Step 2: corrode the surface of the gallium nitride template 11 with an etching solution, and form a hexagonal micropit 20 on the surface of the gallium nitride template 11 (see figure 2 ), the corrosion solution is KOH solution, the temperature is 80°C, the corrosion time is 1-2min, or the volume ratio of the corrosion solution is H 2 SO 4 :H 3 PO 4 = 3:1, the temperature is 260°C, the etching time is 4-8min, the depth of the hexagonal micr...

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Abstract

The invention discloses a growing method for low-dislocation gallium nitride. The method comprises the following steps of: 1, preparing a base plate, wherein the base plate comprises a substrate and a gallium nitride template manufactured on the substrate; 2, corroding the surface of the gallium nitride template by using corrosive liquid to form a hexangular micro-pit on the surface of the gallium nitride template; 3, coating silicon dioxide gel on the surface of the gallium nitride template with the hexangular micro-pit to cover the hexangular micro-pit, and performing spin coating by using a spin coater; 4, curing the silicon dioxide gel on the gallium nitride template by adopting high-temperature sintering; 5, performing treatment by using the solution of NaOH to remove the silicon dioxide gel outside the micro-pit on the gallium nitride template 11; 6, changing the silicon dioxide gel in the hexangular micro-pit into crystals by adopting the high-temperature sintering again; and 7, extending a gallium nitride material on the treated gallium nitride template to finish the growth of the low-dislocation gallium nitride.

Description

technical field [0001] The invention relates to a low dislocation gallium nitride (GaN) growth method, which belongs to the field of semiconductor material growth. Background technique [0002] GaN-based LEDs have outstanding advantages such as energy saving, environmental protection, cold light source, high color rendering index, fast response, small size and long working life. As a green solid light source for the new generation of lighting revolution, it shows great application potential. [0003] At present, sapphire substrate is one of the most commonly used substrates for nitride heteroepitaxial growth. Due to the large lattice constant mismatch and thermal expansion coefficient difference between the sapphire substrate and the nitride epitaxial layer, there are large residual stress and many crystal defects in the nitride epitaxial layer, which affect the crystal quality of the material and limit the Further improvement of the optoelectronic performance of the device...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C30B29/38C30B29/40C30B25/18
Inventor 吴奎魏同波闫建昌刘喆王军喜李晋闽
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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