Vertical parasitic pnp transistor in silicon germanium hbt process and manufacturing method thereof
A PNP triode and vertical parasitic technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of large device area, device size reduction, and large collector connection resistance, so as to reduce collector resistance, Improved performance and reduced area
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[0038] Such as figure 1 Shown is a schematic structural diagram of a vertical parasitic PNP transistor in the silicon germanium HBT process of the embodiment of the present invention. In the silicon germanium HBT process of the embodiment of the present invention, the vertical parasitic PNP transistor is formed on the silicon substrate, and the active region is isolated by the shallow trench field oxygen 1 .
[0039]The base region 3 of the PNP transistor is composed of an N-type ion implantation region formed in the active region. The process conditions of the N-type ion implantation in the base area are as follows: the implanted impurity is phosphorus or arsenic, the energy condition is 100Kev-300Kev, and the dose is 1e14cm -2 ~1e16cm -2 .
[0040] A groove in contact with the base region 3 is formed in the shallow groove field oxygen 1 on the peripheral side of the base region 3, and the shallow groove field oxygen 1 located in the groove is removed, and the The depth o...
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