Method for increasing writing speed of floating body dynamic random access memory

Abstract

The invention discloses a method for increasing a writing speed of a floating body dynamic random access memory. Through back implantation of boron on a grid electrode of a floating body effect access memory of an NMOS (N-channel Metal Oxide Semiconductor) device, in a subsequent heat diffusion process, a boron content in a gate oxide is increased, so that electrons of an electron hole pair, generated by collision, are easier to enter the grid electrode through the gate oxide, thus more holes are swept to a substrate, a substrate current of the floating body effect access unit is increased, and the writing speed of the floating body effect access memory is increased.

Description

technical field [0001] The invention relates to a semiconductor technology, in particular to a method for increasing the writing speed of a floating body dynamic random memory unit. Background technique [0002] The development of embedded dynamic memory technology has made large-capacity DRAM very common in current system-on-chip (SOC). Large-capacity embedded dynamic memory (eDRAM) brings various benefits to SoCs such as improved bandwidth and reduced power consumption that can only be achieved by using embedded technology. In addition to transistors, each memory cell of traditional embedded dynamic memory (eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the memory cell much larger than its width, which makes the manufacturing process difficult. Its manufacturing process is very incompatible with CMOS VLSI process, which limits its application in embedded system-on-chip (SOC). [0003] Floating Body Cell (FBC) is ...

AI Technical Summary

Problems solved by technology

In addition to transistors, each storage unit of traditional embedded dynamic memory (eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the storage unit much larger than its width, which makes the manufacturing process difficult

Its manufacturing process is very incompatible with CMOS VLSI process, which limits its application in embedded system chip (SOC)

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