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Copper and titanium composition for metal layer etching solution

A technology of composition and etching solution, applied in electrical components, circuits, semiconductor/solid-state device manufacturing, etc., can solve problems such as slow etching rate and unstable composition time, achieve fast etching rate, excellent etching performance, and simplify etching effect of steps

Inactive Publication Date: 2014-12-10
DONGWOO FINE CHEM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the case of potassium persulfate-based etchant compositions, the etch rate is slow and the composition becomes unstable over time

Method used

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  • Copper and titanium composition for metal layer etching solution

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1 and comparative example 1

[0037] Embodiment 1 and comparative example 1: preparation of etching solution composition

[0038] 180 kg of an etching liquid composition was prepared using the amounts of components shown in Table 1 below.

[0039] [Table 1]

[0040]

[0041] *APS: Ammonium persulfate

[0042] ABF: Ammonium bifluoride

[0043] ATZ: 5-Aminotetrazole

[0044] PTA: p-toluenesulfonic acid

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Abstract

The present invention relates to a copper and titanium composition for a metal layer etching solution comprising the following, based on the total weight of the composition: 5 to 20 wt % of persulfate; 0.01 to 2 wt % of a fluorine compound; 1-10 wt % of an additive containing one or more acids selected from inorganic acids, salts of inorganic acids, and a mixture thereof; 0.3 to 5 wt % of a cyclic amine compound; 0.1 to 5 wt % of a chlorine compound; 0.1 to 5 wt % of a p-toluene sulfonic acid; and with the remainder being water.

Description

technical field [0001] The present invention relates to an etchant composition for a metal layer containing copper and titanium, the etchant composition is used for gate, source / drain wiring, and electrodes of semiconductor devices and flat panel displays, especially for Electrode of a thin film transistor (TFT). Background technique [0002] In semiconductor devices and flat panel displays, the process of forming metal wiring on a substrate generally includes forming a metal layer by sputtering, coating photoresist, forming photoresist on selected regions by exposure and development, and etching. Furthermore, washing steps are performed before or after each individual step. The etching step leaves the metal layer on selected areas using the photoresist as a mask, and typically includes dry etching using plasma or wet etching using an etchant. [0003] For semiconductor devices and flat panel displays, especially TFTs, the gate and source / drain array wiring consists of a m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): C23F1/18C23F1/30H01L21/205
CPCH01L21/32134C23F1/18C23F1/26C23F1/02C23F1/10C23F1/14C23F1/16C23F1/30H01L21/306H01L21/2855
Inventor 林玟基权五柄李喻珍刘仁浩
Owner DONGWOO FINE CHEM CO LTD
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