Method for saving area of medium- and low-voltage VDMOSFET chip
A chip area, low voltage technology, applied in the direction of circuits, electrical components, electric solid devices, etc., can solve the problems of large VDMOS area, increased product cost, and long terminal diffusion area 6, so as to reduce the chip area and improve the chip yield. The effect of outputting quantity and reducing cost
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[0021] A kind of method of saving the VDMOSFET chip area of middle and low voltage of the present invention, comprises the steps:
[0022] (1) if figure 1 As shown, an active region 1a and an unetched region 1b are formed by etching on polysilicon;
[0023] (2) As shown in Figure 2, a gate oxide region 2c and a polysilicon region 2 are formed by deposition on the active region 1a, wherein the polysilicon region 2 is located above the gate oxide region 21; the polysilicon region 2 includes the polysilicon lead region 2a and the polysilicon region 2 Termination structure region 2b; terminal diffusion region 6 is formed by diffusion between the polysilicon termination structure region 2b and the unetched region 1b;
[0024] (3) if image 3 As shown, an N+ source region 3 is formed by diffusion under the polysilicon lead region 2a and between the polysilicon lead region 2a and the polysilicon termination structure region 2b;
[0025] (4) if Figure 4 As shown, a protective ...
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