Manufacturing method of transient voltage suppressor chip having tunneling effect
A technology of transient suppression and tunnel effect, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of low withstand voltage, achieve the effect of reducing Vc value and realizing tunnel effect
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[0029] The technical solution of the present invention will be described in further detail below through specific embodiments in conjunction with the accompanying drawings.
[0030] Please refer to figure 1 , the flow chart of the method for manufacturing a chip with tunnel effect characteristics disclosed by the present invention mainly includes the following steps:
[0031] 1) Pre-oxidation treatment:
[0032] Chemically treat the surface of silicon wafers through electronic cleaning agents, deionized water cleaning and other processes;
[0033] 2) Oxidation:
[0034] Clean the original silicon wafer, and grow a layer of oxide layer as a mask in an oxidation furnace at 1100-1200 ° C to prevent the boron diffusion source from entering the N+ surface and groove;
[0035] 3) Photolithography:
[0036] Apply glue, expose, and develop the oxidized silicon wafer to form a mesa pattern;
[0037] 4) Remove the oxide layer on one side:
[0038] Remove the oxide layer on one sid...
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