Unlock instant, AI-driven research and patent intelligence for your innovation.

Chip size level gallium-nitride-based transistor and manufacturing method thereof

A gallium nitride-based, chip-sized technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of complex process flow and high production cost, achieve simple preparation process, save purchase cost, and reduce production cost effect

Active Publication Date: 2014-07-23
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
View PDF7 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

All the processes are about 30 steps, the process is complicated and the production cost is high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip size level gallium-nitride-based transistor and manufacturing method thereof
  • Chip size level gallium-nitride-based transistor and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0054] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings. It should be noted that, in the drawings or descriptions of the specification, similar or identical parts all use the same figure numbers. Implementations not shown or described in the accompanying drawings are forms known to those of ordinary skill in the art. Additionally, while illustrations of parameters including particular values ​​may be provided herein, it should be understood that the parameters need not be exactly equal to the corresponding values, but rather may approximate the corresponding values ​​within acceptable error margins or design constraints. The directional terms mentioned in the embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., are only referring to the directions of the...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Thicknessaaaaaaaaaa
Thicknessaaaaaaaaaa
Thicknessaaaaaaaaaa
Login to View More

Abstract

The invention provides a chip size level gallium-nitride-based transistor and a manufacturing method of the transistor. The chip size level gallium-nitride-based transistor comprises a substrate, a low-temperature nucleating layer, a gallium nitride high-resistance layer, a high-mobility gallium nitride layer, an aluminum nitride doped layer, an aluminum gallium nitrogen potential barrier layer and a gallium nitride cap layer, the low-temperature nucleating layer, the gallium nitride high-resistance layer, the high-mobility gallium nitride layer, the aluminum nitride doped layer, the aluminum gallium nitrogen potential barrier layer and the gallium nitride cap layer are sequentially deposited on the front face of the substrate, the two sides of the gallium nitride cap layer are etched to form steps, drain electrodes and source electrodes formed on the steps of the two sides of the gallium nitride cap layer respectively and a grid electrode formed on the gallium nitride cap layer are arranged from the lower edges of the steps to the aluminum gallium nitrogen potential barrier layer, through holes are formed from the lower portions of the drain electrode, the source electrode and the grid electrode to the back face of the substrate respectively, an insulated layer is formed by the side walls of the three through holes, the insulated layer is filled with metal, and therefore the drain electrode, the source electrode and the grid electrode are electrically connected to the back face of the substrate. Metal layers of the drain electrode, the grid electrode and the source electrode are connected to the back face of the substrate through conductive channel modes, and on the foundation that the performance of an original device is not changed, the size of a packaging device is greatly reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor material growth, in particular to a chip-scale gallium nitride-based transistor and a preparation method thereof. Background technique [0002] The main device types of microwave transistors are homojunction bipolar transistor (BJT), heterojunction bipolar transistor (HBT), metal semiconductor field effect transistor (MESFET), metal oxide semiconductor field effect transistor (MOSFET) and high Electron mobility transistor (HEMT), etc. [0003] The band gap of GaN material is large (Eg=3.4eV), the critical breakdown field strength (3.3MV / cm) is relatively large, and the electronic device has the characteristics of high temperature and high pressure resistance; its electron saturation drift speed reaches 2.5×10 7 cm / s, suitable for making high-frequency electronic devices; it can form a surface density up to 1013cm in the heterostructure formed by AlGaN materials -2 The above two-dimensional...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/778H01L21/335H01L21/28
CPCH01L21/28H01L29/66462H01L29/7787
Inventor 谢海忠纪攀峰李璟刘志强伊晓燕王军喜李晋闽
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI