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Storage control device, storage device, information processing system, and processing methods therefor

A storage control and storage unit technology, applied in memory systems, digital memory information, information storage, etc., can solve the problems of time deterioration of data retention characteristics, and achieve the effect of improving data retention characteristics

Inactive Publication Date: 2014-09-10
SONY GRP CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when such control is performed, if only the same data persists, a situation in which physical writing to the memory cell does not occur continues, and there is a problem that the data retention characteristic (retention) deteriorates over time

Method used

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  • Storage control device, storage device, information processing system, and processing methods therefor
  • Storage control device, storage device, information processing system, and processing methods therefor
  • Storage control device, storage device, information processing system, and processing methods therefor

Examples

Experimental program
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Effect test

no. 1 example

[0041] [Structure of information processing system]

[0042] figure 1 is a schematic diagram illustrating an example structure of an information processing system according to an embodiment of the present technology. The information processing system includes a host computer 100 , a storage device 300 and a memory control device 200 . The memory control device 200 and the memory 300 constitute a memory system 400 . The host computer 100 issues instructions to request to read data from or write data to the storage system 400 .

[0043] Memory 300 includes non-volatile memory in addition to typical volatile memory 303 . The nonvolatile memory can be roughly classified into a flash memory 302 that allows data access to a large amount of data to be performed, and a nonvolatile random access memory (NVRAM) 301 that allows random access to a small amount of data to be performed at high speed. Here, a NAND type flash memory can be taken as a typical example of the flash memory 30...

no. 2 example

[0087] In the first embodiment described above, the rewriting of the bottom bit is always enforced by setting a high impedance threshold when establishing the erase mask and a low impedance threshold when establishing the programming mask. In this case, two read-aheads are performed per write, so there is an issue of operational latency. Therefore, the operation mode in the first embodiment is referred to as a protection mode, and a description will be given as the second embodiment in which operations are performed in the protection mode only when necessary. The main system structure is the same as that described in the first embodiment, so, for example, the control unit 350 performs the setting of the operation mode. That is, the control unit 350 is an example of an operation mode setting unit described in the claims.

[0088] [Operation of information processing system]

[0089] Figure 9 is a flowchart illustrating an example processing procedure of the information proc...

no. 3 example

[0097] In a ReRAM using a variable impedance element, data retention characteristics deteriorate with time elapsed since data is stored, and thus the number of errors to be detected and error corrected by an error correction code (ECC) increases. For example, when using an error correcting code with a bit correction capability capable of handling up to four bits, errors of up to four bits can be corrected, but errors of more than four bits cannot be corrected. For this reason, it is effective to use a method of rewriting error-corrected data (data refresh) before error correction becomes impossible. However, when the control is performed as in the standard mode of the second embodiment described above, if the pre-read data and the write data are the same, the programs in all bits are not erased either. On the other hand, when the control is always performed as in the protection mode, the number of times of pre-reading increases, so there is a risk of delaying the operation.

...

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PUM

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Abstract

In the present invention, if write data is a first value, a threshold setting unit (360) sets a first threshold for a read processing unit (317), whereupon a bit operation unit (315) rewrites a memory cell (316) if read data is a second value. If write data is a second value, the threshold setting unit sets a second threshold for the read processing unit, whereupon the bit operation unit rewrites the memory cell if the read data is the first value. By generating read data using first and second thresholds that are different from a standard threshold, data-hold characteristics are improved.

Description

technical field [0001] The technology relates to storage control devices. More specifically, the technology relates to a storage control device for a nonvolatile memory, a storage device, an information processing system and a processing method thereof, and a program instructing a computer to execute the method. Background technique [0002] In an information processing system, a dynamic random access memory (DRAM) or the like is used as a work memory. This type of DRAM is generally volatile memory, so the contents stored in the memory will be lost when the power supply is interrupted. On the other hand, nonvolatile memories (NVM: Nonvolatile Memory Device) have been used in recent years. Such nonvolatile memory devices can be broadly classified into flash memory for large data volume data access and nonvolatile random access memory (NVRAM: non-volatile random access memory) for high-speed random access to small data volume data. volatile random access memory devices). H...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C13/00G11C11/15
CPCG11C7/1045G11C16/10G11C13/0004G11C2013/0076G11C16/3418G11C13/0069G11C2029/0411G11C7/1009G11C13/0033G06F11/1008G11C2207/2263G11C13/0035G11C13/004G11C29/50004G11C13/0059G11C11/1673G11C11/1675G06F12/12G06F12/121G11C13/0002
Inventor 足立直大筒井敬一中西健一大久保英明山本真纪子藤波靖
Owner SONY GRP CORP
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