Manufacturing method of semiconductor device and semiconductor device

A manufacturing method and semiconductor technology, applied in the field of semiconductor device and semiconductor device manufacturing, can solve the problems of enlarging component isolation area, performance degradation of semiconductor device, high density of difficult pixels, etc., and achieve the effect of improving performance and preventing characteristic deviation

Inactive Publication Date: 2015-12-09
RENESAS ELECTRONICS CORP
View PDF7 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the width of the element isolation region is increased in order to avoid these problems, it will be difficult to achieve high pixel density, which will lead to problems such as performance degradation of semiconductor devices.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method of semiconductor device and semiconductor device
  • Manufacturing method of semiconductor device and semiconductor device
  • Manufacturing method of semiconductor device and semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0050] pass below Figure 1 to Figure 6 The semiconductor device in this embodiment mode will be described. The semiconductor device in this embodiment mode is related to a solid-state image sensor, particularly a solid-state image sensor having a plurality of photodiodes in one pixel.

[0051] figure 1 Shown is a schematic diagram of the structure of the solid-state image sensor related to the first embodiment of the present invention. The semiconductor device in this embodiment, that is, the solid-state image sensor is a CMOS (Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor) imaging sensor. Such as figure 1 As shown, the solid-state image sensor has a pixel array unit PEA, readout circuits CC1, CC2, an output circuit OC, a row selection circuit RC, and a control circuit COC.

[0052] In the pixel array unit PEA, a plurality of pixels PE are arranged in rows and columns. figure 1 The indicated X-axis direction is a direction along the mai...

no. 2 Embodiment approach

[0158] In this embodiment, the case where the distance between the photodiodes arrayed in the pixel can be increased by shifting the formation positions of the photodiodes in the pixels which coincide with the boundary line of the divided exposure is shifted.

[0159] Figure 14 Shown is a plan layout diagram of a semiconductor device in this embodiment mode. Figure 14 and Figure 4 Similarly, among the plurality of pixels arranged in the pixel array section of the solid-state image sensor, the pixel PE2 that coincides with the boundary line DL in planar view is shown. The configuration of the solid-state image sensor in this embodiment is almost the same as that of the solid-state image sensor in the first embodiment, but Figure 14 In the present invention, the distance between the photodiodes PD1 and PD2 in the pixel PE2 is large, which is different from the first embodiment.

[0160] Specifically, compared with the first embodiment, the formation positions of the photo...

no. 3 Embodiment approach

[0177] In this embodiment mode, the distance between the photodiodes arranged in the pixel is increased and the area of ​​the photodiodes is reduced.

[0178] Figure 16 Shown is a plan layout diagram of a semiconductor device in this embodiment mode. Figure 16 and Figure 4 Similarly, among the plurality of pixels arranged on the pixel array portion of the solid-state image sensor, the pixel PE2 that coincides with the boundary line DL in planar view is shown. The structure of the solid-state image sensor in this embodiment is almost the same as that of the second embodiment, including that the distance between the photodiodes PD1 and PD2 in the pixel PE2 is relatively large. Figure 16 The photodiodes PD1 and PD2 in the middle pixel PE2 are different from the second embodiment in that the area of ​​each of the photodiodes PD1 and PD2 is small.

[0179] That is to say, in the second embodiment, by shifting the formation positions of the photodiodes PD1 and PD2 in the pixe...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The performance of a solid state image sensor which is formed by performing divided exposure that exposes the entire chip by a plurality of times of exposure and in which each of a plurality of pixels arranged in a pixel array portion has a plurality of photodiodes is improved. In the divided exposure performed when the solid state image sensor is manufactured, a dividing line that divides an exposure region is defined to be located between a first photodiode and a second photodiode aligned in a first direction in an active region in a pixel and is defined to be along a second direction perpendicular to the first direction.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof, in particular to a technology applicable to a semiconductor device with a solid-state image sensor and a manufacturing method thereof. Background technique [0002] When an image sensor (image sensor) used in a digital camera etc. is formed on a large-sized chip in order to realize a high pixel size, in the manufacturing process, since the entire chip cannot be exposed with one exposure, the exposure process is performed several times. That is, split exposure processing. [0003] In addition, in a solid-state image sensor applied to the phase difference technology used in a digital camera equipped with an auto-focus system function, at least two photodiodes are provided for each of a plurality of pixels constituting the image sensor. Well known. [0004] Patent Document 1 (Japanese Unexamined Patent Publication No. 05-6849) discloses a technology that, when a large-si...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146G03F7/20H01L21/027
CPCH01L27/14603H01L27/14641H01L27/14621H01L27/14627H01L27/14636H01L27/14645H01L27/14612H01L27/1463H01L27/14643H01L27/14689H01L27/14605
Inventor 木村雅俊
Owner RENESAS ELECTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap