Graphene field effect transistor and fabrication method thereof

Abstract

The invention relates to a graphene field effect transistor. According to the transistor, a top gate structure with source-end and drain-end crossing characteristics is designed in an active region part, so that the actual size of a gate graph above the active region under the same gate length is greater than the size of the graph in the part corresponding to the traditional graphene top gate field effect transistor; and the yield of fabricating a device is improved under the same electron beam direct-write exposure overlay alignment precision. In addition, by the structure, the space between a channel region and a source end or a drain end is only the thickness of a gate dielectric layer; and the via resistance of a non-gate-controlled channel is effectively reduced, so that the parasitic resistance of the device is reduced; the output current is increased; and the parasitic capacitance introduced into the contact region of the top gate and the source end and the source end is greatly reduced by a silicon oxide insulating layer deposited in a non-channel region of the active region of the device.

Description

technical field [0001] The invention belongs to the field of electronic devices, and relates to a graphene field-effect transistor and a manufacturing method thereof, in particular to a graphene top-gate field-effect transistor and a manufacturing method thereof. Background technique [0002] Graphene refers to a two-dimensional carbon material composed of a layer of carbon atoms closely arranged periodically in a benzene ring structure (that is, a hexagonal honeycomb structure). Due to its excellent and unique electrical properties, it has been used in the field of electronic devices in recent years Applied research is getting deeper and deeper. Graphene field effect transistors use the regulation of the electric field to change the conductivity type of the device, carrier mobility, etc., so as to meet specific application requirements. The graphene top-gate field-effect transistor means that the gate electrode that regulates the graphene conductive channel is located abov...

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Problems solved by technology

Due to the limitation of electron beam direct writing exposure overlay alignment accuracy, the gate structure of the device will deviate from the center of symmetry, and the change of this structure is random, resulting in unstable performance of the final device; Thin, when the gate electrode overlaps with the source or drain, it will cause the parasitic capacitance at the input or output of the field effect transistor to increase, thereby deteriorating the high frequency performance of the device

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