A MEMS Monolithic Integration Method Based on Five-Layer SOI Silicon Wafer

Abstract

The invention discloses an MEMS single-wafer integration method based on five layers of SOI silicon wafers. The MEMS single-wafer integration method comprises the following steps: completing production of an integrated circuit part on a silicon wafer by adopting a standard SOI CMOS process; depositing a passivation layer on the silicon wafer so as to protect the integrated circuit part; performing photoetching at the back of the silicon wafer, etching backside silicon to an insulating layer, and etching the exposed insulating layer; performing photoetching on the front of the silicon wafer, and etching to remove silicon and the insulating layer on an MEMS structural area so as to expose a structural layer; sputtering a titanium layer and an aluminium layer on the front of the silicon wafer, performing photoetching to obtain a metal connection line between the MEMS structure and the integrated circuit; performing photoetching on the front of the silicon wafer, and etching to obtain the MEMS structure; and splitting, packaging and testing. According to the method disclosed by the invention, the problem of electrically isolating the integrated circuit from the MEMS structure in the current MEMS single-wafer integrated technology can be overcome; furthermore, a thick monocrystalline silicon structural layer is obtained by adopting a bulk silicon process; and thus, requirements of high-performance inertial MEMS sensors are satisfied.

Description

technical field [0001] The invention belongs to the technical field of micro-electromechanical system micromachining, and in particular relates to a monolithic integration method of five-layer silicon on insulator (Silicon on insulator, SOI) micro-electromechanical systems (Micro-electromechanical Systems, MEMS). Background technique [0002] In recent years, MEMS technology has developed rapidly and has broad application space in many fields. Integrating the MEMS structure, drive, detection, and signal processing circuits on one chip can reduce signal transmission loss, reduce circuit noise, suppress interference from circuit parasitic capacitance, achieve high signal-to-noise ratio, improve measurement accuracy, and effectively reduce Power consumption and size. Foreign countries have successfully integrated circuits and MEMS structures into a single chip by using surface technology, but the thickness of the quality block of the surface technology is small, the stress of ...

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Problems solved by technology

However, using the above method, it is difficult to isolate the MEMS structure from the circuit, and it is difficult to control the thickness uniformity of the MEMS structure area.

[0004] The patent application number is 201210110743.5 "A SOI MEMS monolithic integration method", which also uses Post-CMOS technology and bulk silicon MEMS technology, and can produce larger masses and high structural aspect ratios, but this method Method The MEMS structure and the circuit are electrically isolated by air isolation grooves, and the processing of the isolation grooves is also relatively difficult

[0005] The circuits made by the above two methods are the same as those made by ordinary single crystal silicon wafers, and the advantages of SOI materials in circuits such as radiation resistance, low power consumption, and high temperature resistance cannot be used.

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