Photolithography method for semiconductor device, method for manufacturing flash memory device, and flash memory device

Abstract

The invention discloses a semiconductor device photoetching method, a flash memory device manufacturing method, and a flash memory device. A semiconductor device comprises a to-be-etched region and a non-etched region. The semiconductor device photoetching method comprises steps of: forming a mask layer on the semiconductor device; forming a first photoresistive adhesive layer subjected to ion implantation on a mask in the non-etched region; forming a second photoresistive adhesive layer on the first photoresistive adhesive layer and a mask in the to-be-etched region; and exposing and etching the second photoresistive adhesive layer in the to-be-etched region. According to the method, before the second photoresistive adhesive layer in the to-be-etched region is exposed and etched, the first photoresistive adhesive layer subjected to ion implantation is formed on the mask in the non-etched region. The first photoresistive adhesive layer is capable of reducing damage to the non-etched region in a photoetching process so as to improve the performance of the semiconductor device.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to a photolithography method for a semiconductor device, a method for manufacturing a flash memory device, and a flash memory device. Background technique [0002] In the manufacturing process of semiconductor integrated circuits, some devices have different heights, so that isolation is formed between devices with different performances, thereby improving the breakdown voltage and other performances of transistors. However, devices with different heights will lead to the generation of stepped structures on the chip, and such stepped structures will usually affect subsequent processes such as photolithography and ion implantation, especially the fabrication process of stepped gates. For example, when photolithography and etching processes are performed on the lower gate, the higher gate will be damaged, thereby affecting the stability of the chip. [0003]...

AI Technical Summary

Problems solved by technology

However, in order to improve the equalization of the film thickness of the whole chip, when using ArF laser light source for photolithography, the thickness of the required photoresist is generally small (0.2 μm ~ 0.5 μm), so the photolithography and etching of the logic circuit area During the etching process, it is bound to cause damage to the floating gate and control gate of the memory cell area.

[0004] In order to avoid damage to the memory cell area during the photolithography and etching process, there are currently two methods: one is to deposit a layer of hard mask on the control gate as a protective layer, but after the photolithography and etching process is completed, a wet method is required. Etching removes the hard mask, and the wet etching process will further cause gate damage; the second is to deposit multiple layers of photoresist on the control gate to prevent damage to the subsequent process, but when using ArF laser light source for photolithography, the photoresist Dissolution will occur between them, resulting in insignificant blocking effect

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