A silicon carbide superjunction MOSFET device with low on-resistance and small gate charge and its preparation method

Abstract

The invention provides a low-on-resistance small-gate-charge silicon carbide super-junction MOSFET device and a preparation method thereof. The device comprises a source, a first conduction type source region contact, a second conduction type base region, a heavily doped second conduction type trench region, a first conduction type polycrystalline silicon gate, a second conduction type polycrystalline silicon gate, a trench gate dielectric, a second conduction type gate oxide protection region, a first conduction type coating region, a first conduction type drift region, a second conduction type columnar region, a first conduction type substrate and a drain. According to the invention, because of a space charge region formed by the first conduction type polycrystalline silicon gate and thesecond conduction type polycrystalline silicon gate, coupling between the gate and the drain is reduced, so that the gate charge of the device is reduced; with the first conduction type coating region, the space charge region formed in the drift region by the second conduction type gate oxide protection region is reduced; and currents are transmitted effectively, so that the on resistance of thedevice is reduced.

Description

technical field [0001] The invention belongs to the field of silicon carbide power devices of microelectronics and power electronics, and in particular relates to a silicon carbide superjunction MOSFET device with low on-resistance and small gate charge and a preparation method. Background technique [0002] Wide bandgap semiconductor silicon carbide, because of its large bandgap, high thermal conductivity, high breakdown field strength, high electron saturation velocity and strong radiation resistance, makes silicon carbide power semiconductor devices applicable radiation working environment. In the field of power electronics, power MOSFETs are widely used due to their advantages such as simple driving circuits and short switching times. [0003] In the power MOSFET device, the lateral power MOSFET has a large on-resistance due to the parasitic JFET area, while in the vertical structure power trench gate MOSFET device, its structure design eliminates the JFET area, which g...

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Problems solved by technology

However, with the introduction of the P+ gate oxide protection region, the depletion region formed in the drift region seriously affects the downward transmission of electrons, making the on-resistance of the device larger

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