A kind of graphene transistor and preparation method thereof
A graphene and transistor technology, applied in transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problem that graphene transistors cannot be turned off, and achieve a technology suitable for large-scale promotion and production, ingenious design and simple structure. Effect
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[0025] A method for preparing a graphene transistor, comprising the steps of:
[0026] Make a graphene PN junction on the substrate;
[0027] Make source and drain contact electrodes on both sides of the graphene PN junction;
[0028] In the P region or N region of the graphene PN junction, a gate forming an angle of 45° with the junction region is fabricated, and the gate runs through the P region or N region.
[0029] Preferably, the source and drain contact electrodes are parallel to the junction region of the graphene PN junction.
[0030] Preferably, the making of graphene PN junction comprises the following steps:
[0031] growing an N-type graphene layer on the substrate;
[0032] The N-region that needs to be kept is covered with a medium, and a P-type graphene layer is made in the bare area by element doping or surface doping, and the covering medium of the N-region is removed;
[0033] Or grow a P-type graphene layer on the substrate;
[0034] The P region that ...
Embodiment 1
[0045] see figure 1 , a method for preparing a graphene transistor provided in Embodiment 1 of the present invention, comprising steps:
[0046] S101: On a high-purity semi-insulating silicon carbide substrate, generate N-type single-layer epitaxial graphene by thermal decomposition;
[0047] S102: Electron beam evaporating the aluminum oxide protective layer on the region where the N-type doping needs to be retained;
[0048] S103: placing the sample in a vacuum chamber, and annealing in a hydrogen atmosphere at 700°C for 1 hour to form a P-type doped graphene region;
[0049] S104: remove the aluminum oxide protective layer, and form a graphene PN junction by photolithography;
[0050] S105: Electron beam evaporation of 200nm thick gold as source and drain contact electrodes;
[0051] S106: In the graphene PN junction N region, a T-shaped grid with an angle of 45° to the graphene PN junction and a length of 30nm is formed by the electron beam direct writing process, the e...
Embodiment 2
[0056] see Figure 5 , a method for preparing a graphene transistor provided in Embodiment 2 of the present invention, comprising steps:
[0057] S201: On a high-purity semi-insulating silicon carbide substrate, generate P-type single-layer epitaxial graphene by chemical vapor deposition;
[0058] S202: Electron beam evaporating the palladium metal protective layer on the region where the P-type doping needs to be retained;
[0059] S203: coating the surface of the sample with bibenzylpyridine to form an N-type doped graphene region;
[0060] S204: remove the palladium metal protective layer, and form a graphene PN junction by photolithography;
[0061] S205: Electron beam evaporation of 500nm thick palladium, photolithography to form source and drain contact electrodes;
[0062] S206: In the graphene PN junction P region, form a Y-shaped grid with an angle of 45° with the graphene PN junction and a length of 1 μm through the electron beam direct writing process, electron b...
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